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hasvk: Delete enum anv_depth_reg_mode

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This is only used on gfx12+.

Reviewed-by: Lionel Landwerlin <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42394>
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Nanley Chery authored and elwrcl committed 2026-07-21 14:29:22 +03:00
1 parent 1393b91322
commit 3126a5ef30
1 file changed
-13
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src/intel/vulkan_hasvk/anv_private.h
-13
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@@ -2470,12 +2470,6 @@ struct anv_cmd_graphics_state {
bool has_uint_rt; bool has_uint_rt;
}; };
enum anv_depth_reg_mode {
ANV_DEPTH_REG_MODE_UNKNOWN = 0,
ANV_DEPTH_REG_MODE_HW_DEFAULT,
ANV_DEPTH_REG_MODE_D16_1X_MSAA,
};
/** State tracking for compute pipeline /** State tracking for compute pipeline
* *
* This has anv_cmd_pipeline_state as a base struct to track things which get * This has anv_cmd_pipeline_state as a base struct to track things which get
@@ -2532,13 +2526,6 @@ struct anv_cmd_state {
*/ */
bool hiz_enabled; bool hiz_enabled;
/* We ensure the registers for the gfx12 D16 fix are initialized at the
* first non-NULL depth stencil packet emission of every command buffer.
* For secondary command buffer execution, we transfer the state from the
* last command buffer to the primary (if known).
*/
enum anv_depth_reg_mode depth_reg_mode;
bool conditional_render_enabled; bool conditional_render_enabled;
/** /**