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hasvk: We can use ARYSPC_LOD0 for layered DPB.
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@@ -2359,7 +2359,10 @@ isl_calc_array_pitch_el_rows_gfx4_2d(
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* image size to accomodate that pitch.
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*/
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if (info->array_pitch_B) {
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assert(ISL_GFX_VER(dev) >= 8);
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/* GFX 7 can use ARYSPC_LOD0 for video decode. */
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assert(ISL_GFX_VER(dev) >= 8 ||
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(ISL_GFX_VER(dev) >= 7 &&
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(info->usage & ISL_SURF_USAGE_VIDEO_DECODE_BIT)));
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uint32_t tiled_aligned_row_pitch_B =
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align((fmtl->bpb / 8) * phys_slice0_sa->w, tile_info->phys_extent_B.width);
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assert(info->array_pitch_B % tiled_aligned_row_pitch_B == 0);
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@@ -3781,8 +3784,12 @@ isl_surf_init_interleaved_arrays(const struct isl_device *dev,
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uint32_t *surfs_offsets,
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const struct isl_surf_init_info *infos)
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{
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/* Adjusting the array pitch is only supported on GFX 8+ */
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assert(ISL_GFX_VER(dev) >= 8);
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/* Adjusting the array pitch is only supported on GFX 8+.
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* However, GFX 7 can use ARYSPC_LOD0 here for layered DPB.
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*/
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assert(ISL_GFX_VER(dev) >= 8 ||
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(ISL_GFX_VER(dev) >= 7 && total_surf > 0 &&
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(infos[0].usage & ISL_SURF_USAGE_VIDEO_DECODE_BIT)));
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assert(total_surf <= ISL_SURF_MAX_INTERLEAVED_ARRAYS);
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/* Do a first pass to gather uninterleave surface layouts */
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@@ -137,20 +137,11 @@ image_binding_grow(const struct anv_device *device,
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"VkImageDrmFormatModifierExplicitCreateInfoEXT::"
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"pPlaneLayouts[]::offset is misaligned");
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}
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/* We require that surfaces be added in memory-order. This simplifies the
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* layout validation required by
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* VkImageDrmFormatModifierExplicitCreateInfoEXT,
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*/
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if (unlikely(offset < container->size)) {
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return vk_errorf(device,
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VK_ERROR_INVALID_DRM_FORMAT_MODIFIER_PLANE_LAYOUT_EXT,
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"VkImageDrmFormatModifierExplicitCreateInfoEXT::"
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"pPlaneLayouts[]::offset is too small");
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}
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}
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if (__builtin_add_overflow(offset, size, &container->size)) {
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/* Track the end of each memory plane instead of assuming an append order. */
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uint64_t memory_range_end;
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if (__builtin_add_overflow(offset, size, &memory_range_end)) {
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if (has_implicit_offset) {
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assert(!"overflow");
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return vk_errorf(device, VK_ERROR_UNKNOWN,
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@@ -163,6 +154,7 @@ image_binding_grow(const struct anv_device *device,
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}
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}
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container->size = MAX2(container->size, memory_range_end);
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container->alignment = MAX2(container->alignment, alignment);
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*out_range = (struct anv_image_memory_range) {
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@@ -1102,6 +1094,8 @@ add_all_surfaces_implicit_interleaved_arrays_layout(
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return result;
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}
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image->vid_layered_interleaved = true;
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return VK_SUCCESS;
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}
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@@ -1121,8 +1115,7 @@ add_all_surfaces_implicit_layout(
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const struct intel_device_info *devinfo = device->info;
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VkResult result;
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/* XXX: Based on what I could glean from !35651. */
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if (devinfo->ver == 8 && image->n_planes > 1 && !image->disjoint &&
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if (devinfo->ver >= 7 && image->n_planes > 1 && !image->disjoint &&
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image->vk.array_layers > 1 &&
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(image->vk.usage & (VK_IMAGE_USAGE_VIDEO_DECODE_DST_BIT_KHR |
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VK_IMAGE_USAGE_VIDEO_DECODE_DPB_BIT_KHR))) {
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@@ -3227,6 +3227,8 @@ struct anv_image {
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bool vid_neutral_chroma_init;
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bool vid_layered_interleaved;
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/**
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* The memory bindings created by vkCreateImage and vkBindImageMemory.
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*
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@@ -251,9 +251,10 @@ anv_h264_decode_video(struct anv_cmd_buffer *cmd_buffer,
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const struct anv_image *img = iv->image;
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#if GFX_VER < 8
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const bool gen7_layered_clamp = img->vk.array_layers > 1;
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const bool gen7_layered_clamp =
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img->vk.array_layers > 1 && !img->vid_layered_interleaved;
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if (gen7_layered_clamp)
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mesa_logw_once("Layered DPB is broken on gen7 when the array pitch is not tile aligned.");
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mesa_logw_once("Layered DPB is broken on GFX 7 when the array pitch is not tile aligned.");
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#else
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const bool gen7_layered_clamp = false;
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#endif
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