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hasvk: Honour inline video encode feedback queries.

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VK_KHR_video_maintenance1 lets a client chain VkVideoInlineQueryInfoKHR onto
vkCmdEncodeVideoKHR instead of bracketing it with vkCmdBeginQuery and
vkCmdEndQuery.  The driver advertises the feature but only ever wrote the
feedback result to the address vkCmdBeginQuery had recorded, so with an
inline query nothing wrote the result or marked it available and the client
waited on a query that never became ready.

Derive the address from the chained pool when one is present.

dEQP-VK.video.encode.h264.inline_query_* went from DEVICE_LOST, which also
aborted the rest of the run, to Pass.  With this and the missing 352x288
input clip generated, the whole h264 encode family now runs clean: 18 pass,
0 fail out of 120, no aborts.

Co-Authored-By: Claude Opus 5 <[email protected]>
This commit is contained in:
elwrclandClaude Opus 5 committed 2026-08-21 06:49:00 +03:00
1 parent 30cbb40eb0
commit 4caedfb57d
1 file changed
+16 -2
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src/intel/vulkan_hasvk/genX_cmd_video.c
+16 -2
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@@ -1197,8 +1197,22 @@ anv_h264_encode_video(struct anv_cmd_buffer *cmd_buffer,
* counter is only stable after the MFC pipe has drained, so a CS stall plus
* MFX_WAIT is issued first (mirroring the frame-end sync in
* CmdEndVideoCodingKHR). */
if (cmd_buffer->video.encode_feedback_query_addr.bo != NULL) {
struct anv_address addr = cmd_buffer->video.encode_feedback_query_addr;
/* VK_KHR_video_maintenance1 lets the query be chained onto the encode
* command instead of bracketing it with vkCmdBeginQuery/vkCmdEndQuery, in
* which case nothing recorded an address for us and we derive it here. */
struct anv_address feedback_addr = cmd_buffer->video.encode_feedback_query_addr;
const VkVideoInlineQueryInfoKHR *inline_query =
vk_find_struct_const(encode_info->pNext, VIDEO_INLINE_QUERY_INFO_KHR);
if (inline_query && inline_query->queryPool != VK_NULL_HANDLE) {
ANV_FROM_HANDLE(anv_query_pool, iq_pool, inline_query->queryPool);
feedback_addr = (struct anv_address) {
.bo = iq_pool->bo,
.offset = inline_query->firstQuery * iq_pool->stride,
};
}
if (feedback_addr.bo != NULL) {
struct anv_address addr = feedback_addr;
#if GFX_VER == 8
anv_batch_emit(&cmd_buffer->batch, GENX(MI_FLUSH_DW), flush) {