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src/intel/genxml/README
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This provides some background the design of the generated headers. We
started out trying to generate bit fields but it evolved into the pack
functions because of a few limitations:
1) Bit fields still generate terrible code today. Even with modern
optimizing compilers you get multiple load+mask+store operations
to the same dword in memory as you set individual bits. The
compiler also has to generate code to mask out overflowing values
(for example, if you assign 200 to a 2 bit field). Our driver
never writes overflowing values so that's not needed. On the
other hand, most compiler recognize that the template struct we
use is a temporary variable and copy propagate the individual
fields and do amazing constant folding. You should take a look
at the code that gets generated when you compile in release mode
with optimizations.
2) For some types we need to have overlapping bit fields. For
example, some values are 64 byte aligned 32 bit offsets. The
lower 5 bits of the offset are always zero, so the hw packs in a
few misc bits in the lower 5 bits there. Other times a field can
be either a u32 or a float. I tried to do this with overlapping
anonymous unions and it became a big mess. Also, when using
initializers, you can only initialize one union member so this
just doesn't work with out approach.
The pack functions on the other hand allows us a great deal of
flexibility in how we combine things. In the case of overlapping
fields (the u32 and float case), if we only set one of them in
the pack function, the compiler will recognize that the other is
initialized to 0 and optimize out the code to or it it.
3) Bit fields (and certainly overlapping anonymous unions of bit
fields) aren't generally stable across compilers in how they're
laid out and aligned. Our pack functions let us control exactly
how things get packed, using only simple and unambiguous bitwise
shifting and or'ing that works on any compiler.
Once we have the pack function it allows us to hook in various
transformations and validation as we go from template struct to dwords
in memory:
1) Validation: As I said above, our driver isn't supposed to write
overflowing values to the fields, but we've of course had lots of
cases where we make mistakes and write overflowing values. With
the pack function, we can actually assert on that and catch it at
runtime. bitfields would just silently truncate.
2) Type conversions: some times it's just a matter of writing a
float to a u32, but we also convert from bool to bits, from
floats to fixed point integers.
3) Relocations: whenever we have a pointer from one buffer to
another (for example a pointer from the meta data for a texture
to the raw texture data), we have to tell the kernel about it so
it can adjust the pointer to point to the final location. That
means extra work we have to do extra work to record and annotate
the dword location that holds the pointer. With bit fields, we'd
have to call a function to do this, but with the pack function we
generate code in the pack function to do this for us. That's a
lot less error prone and less work.
Keeping genxml files tidy :
In order to spot differences easily between generations, we keep genxml files sorted.
You can trigger the sort by running :
$ cd src/intel/genxml; ./gen_sort_tags.py
gen_sort_tags.py is the script that sorts genxml files using with
the following rules :
1) Tags are grouped in the following order <enum>, <struct>,
<instruction>, <register>
2) <field> tags are sorted through the value of their start attribute
3) Sort <struct> tags by dependency so that other scripts have
everything properly ordered.
For xml files with names that begin with "gen", the number in the
filename is the version number multiplied by 10 (verx10).
All xml files include a gen attribute associated with the hardware
generation.
src/intel/genxml/gen110.xml
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src/intel/genxml/gen120.xml
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src/intel/genxml/gen125.xml
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src/intel/genxml/gen125_rt.xml
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<?xml version='1.0' encoding='utf-8'?>
<genxml name="RT" gen="12.5">
<struct name="BINDLESS_SHADER_RECORD" length="2">
<field name="Offset To Local Arguments" dword="0" bits="2:0" type="uint" />
<field name="Bindless Shader Dispatch Mode" dword="0" bits="4:4" type="uint">
<value name="RT_SIMD16" value="0" />
<value name="RT_SIMD8" value="1" />
</field>
<field name="Kernel Start Pointer" dword="0" bits="31:6" type="offset" />
</struct>
<struct name="RT_SHADER_TABLE" length="2">
<field name="Base Address" dword="0" bits="47:0" type="address" />
<field name="Stride" dword="1" bits="31:16" type="uint" />
</struct>
<struct name="RT_DISPATCH_GLOBALS" length="20">
<field name="Mem Base Address" dword="0" bits="63:0" type="address" />
<field name="Call Stack Handler" dword="2" bits="63:0" type="BINDLESS_SHADER_RECORD" />
<field name="Async RT Stack Size" dword="4" bits="31:0" type="uint" />
<field name="Num DSS RT Stacks" dword="5" bits="15:0" type="uint" />
<field name="Max BVH Levels" dword="6" bits="2:0" type="uint" />
<field name="Flags" dword="7" bits="0:0" type="uint">
<value name="RT_DEPTH_TEST_LESS_EQUAL" value="1" />
</field>
<field name="Hit Group Table" dword="8" bits="63:0" type="RT_SHADER_TABLE" />
<field name="Miss Group Table" dword="10" bits="63:0" type="RT_SHADER_TABLE" />
<field name="SW Stack Size" dword="12" bits="31:0" type="uint" />
<field name="Launch Width" dword="13" bits="31:0" type="uint" />
<field name="Launch Height" dword="14" bits="31:0" type="uint" />
<field name="Launch Depth" dword="15" bits="31:0" type="uint" />
<field name="Callable Group Table" dword="16" bits="63:0" type="RT_SHADER_TABLE" />
<field name="Resume Shader Table" dword="18" bits="63:0" type="address" />
</struct>
<struct name="RT_GENERAL_SBT_HANDLE" length="8">
<field name="General" dword="0" bits="63:0" type="BINDLESS_SHADER_RECORD" />
</struct>
<struct name="RT_PROCEDURAL_SBT_HANDLE" length="8">
<field name="Closest Hit" dword="0" bits="63:0" type="BINDLESS_SHADER_RECORD" />
<field name="Intersection" dword="2" bits="63:0" type="BINDLESS_SHADER_RECORD" />
</struct>
<struct name="RT_TRIANGLES_SBT_HANDLE" length="8">
<field name="Closest Hit" dword="0" bits="63:0" type="BINDLESS_SHADER_RECORD" />
<field name="Any Hit" dword="2" bits="63:0" type="BINDLESS_SHADER_RECORD" />
</struct>
</genxml>
src/intel/genxml/gen40.xml
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src/intel/genxml/gen45.xml
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<?xml version='1.0' encoding='utf-8'?>
<genxml name="CTG" gen="4.5">
<import name="gen40.xml" />
<struct name="CLIP_STATE" length="11">
<field name="GRF Register Count" dword="0" bits="3:1" type="uint" />
<field name="Kernel Start Pointer" dword="0" bits="31:6" type="address" />
<field name="Software Exception Enable" dword="1" bits="7:7" type="bool" />
<field name="Mask Stack Exception Enable" dword="1" bits="11:11" type="bool" />
<field name="Illegal Opcode Exception Enable" dword="1" bits="13:13" type="bool" />
<field name="Floating Point Mode" dword="1" bits="16:16" type="uint" prefix="FLOATING_POINT_MODE">
<value name="IEEE-754" value="0" />
<value name="Alternate" value="1" />
</field>
<field name="Thread Priority" dword="1" bits="17:17" type="uint">
<value name="Normal Priority" value="0" />
<value name="High Priority" value="1" />
</field>
<field name="Binding Table Entry Count" dword="1" bits="25:18" type="uint" />
<field name="Single Program Flow" dword="1" bits="31:31" type="bool" />
<field name="Per-Thread Scratch Space" dword="2" bits="3:0" type="uint" />
<field name="Scratch Space Base Pointer" dword="2" bits="31:10" type="address" />
<field name="Dispatch GRF Start Register For URB Data" dword="3" bits="3:0" type="uint" />
<field name="Vertex URB Entry Read Offset" dword="3" bits="9:4" type="uint" />
<field name="Vertex URB Entry Read Length" dword="3" bits="16:11" type="uint" />
<field name="Constant URB Entry Read Offset" dword="3" bits="23:18" type="uint" />
<field name="Constant URB Entry Read Length" dword="3" bits="30:25" type="uint" />
<field name="Clipper Statistics Enable" dword="4" bits="10:10" type="bool" />
<field name="GS Output Object Statistics Enable" dword="4" bits="10:10" type="bool" />
<field name="Number of URB Entries" dword="4" bits="18:11" type="uint" />
<field name="URB Entry Allocation Size" dword="4" bits="23:19" type="uint" />
<field name="Maximum Number of Threads" dword="4" bits="30:25" type="uint" />
<field name="Clip Mode" dword="5" bits="15:13" type="uint" prefix="CLIPMODE">
<value name="NORMAL" value="0" />
<value name="ALL" value="1" />
<value name="CLIP_NON_REJECTED" value="2" />
<value name="REJECT_ALL" value="3" />
<value name="ACCEPT_ALL" value="4" />
</field>
<field name="UserClipDistance ClipTest Enable Bitmask" dword="5" bits="23:16" type="uint" />
<field name="UserClipFlags MustClip Enable" dword="5" bits="24:24" type="bool" />
<field name="Negative W ClipTest Enable" dword="5" bits="25:25" type="bool" />
<field name="Guardband ClipTest Enable" dword="5" bits="26:26" type="bool" />
<field name="Viewport Z ClipTest Enable" dword="5" bits="27:27" type="bool" />
<field name="Viewport XY ClipTest Enable" dword="5" bits="28:28" type="bool" />
<field name="Vertex Position Space" dword="5" bits="29:29" type="uint" prefix="VPOS">
<value name="NDCSPACE" value="0" />
<value name="SCREENSPACE" value="1" />
</field>
<field name="API Mode" dword="5" bits="30:30" type="uint" prefix="APIMODE">
<value name="OGL" value="0" />
<value name="D3D" value="1" />
</field>
<field name="Clipper Viewport State Pointer" dword="6" bits="31:5" type="address" />
<field name="Screen Space Viewport X Min" dword="7" bits="31:0" type="float" />
<field name="Screen Space Viewport X Max" dword="8" bits="31:0" type="float" />
<field name="Screen Space Viewport Y Min" dword="9" bits="31:0" type="float" />
<field name="Screen Space Viewport Y Max" dword="10" bits="31:0" type="float" />
</struct>
<struct name="GS_STATE" length="7">
<field name="GRF Register Count" dword="0" bits="3:1" type="uint" />
<field name="Kernel Start Pointer" dword="0" bits="31:6" type="address" />
<field name="Software Exception Enable" dword="1" bits="7:7" type="bool" />
<field name="Mask Stack Exception Enable" dword="1" bits="11:11" type="bool" />
<field name="Illegal Opcode Exception Enable" dword="1" bits="13:13" type="bool" />
<field name="Floating Point Mode" dword="1" bits="16:16" type="uint" prefix="FLOATING_POINT_MODE">
<value name="IEEE-754" value="0" />
<value name="Alternate" value="1" />
</field>
<field name="Binding Table Entry Count" dword="1" bits="25:18" type="uint" />
<field name="Single Program Flow" dword="1" bits="31:31" type="bool" />
<field name="Per-Thread Scratch Space" dword="2" bits="3:0" type="uint" />
<field name="Scratch Space Base Pointer" dword="2" bits="31:10" type="address" />
<field name="Dispatch GRF Start Register For URB Data" dword="3" bits="3:0" type="uint" />
<field name="Vertex URB Entry Read Offset" dword="3" bits="9:4" type="uint" />
<field name="Vertex URB Entry Read Length" dword="3" bits="16:11" type="uint" />
<field name="Constant URB Entry Read Offset" dword="3" bits="23:18" type="uint" />
<field name="Constant URB Entry Read Length" dword="3" bits="30:25" type="uint" />
<field name="Rendering Enable" dword="4" bits="8:8" type="bool" />
<field name="GS Statistics Enable" dword="4" bits="10:10" type="bool" />
<field name="Number of URB Entries" dword="4" bits="18:11" type="uint" />
<field name="URB Entry Allocation Size" dword="4" bits="23:19" type="uint" />
<field name="Maximum Number of Threads" dword="4" bits="30:25" type="uint" />
<field name="Sampler Count" dword="5" bits="2:0" type="uint" />
<field name="Sampler State Pointer" dword="5" bits="31:5" type="address" />
<field name="Maximum VPIndex" dword="6" bits="3:0" type="uint" />
<field name="Discard Adjacency" dword="6" bits="29:29" type="bool" />
<field name="Reorder Enable" dword="6" bits="30:30" type="bool" />
</struct>
<struct name="RENDER_SURFACE_STATE" length="6">
<field name="Cube Face Enable - Positive Z" dword="0" bits="0:0" type="bool" />
<field name="Cube Face Enable - Negative Z" dword="0" bits="1:1" type="bool" />
<field name="Cube Face Enable - Positive Y" dword="0" bits="2:2" type="bool" />
<field name="Cube Face Enable - Negative Y" dword="0" bits="3:3" type="bool" />
<field name="Cube Face Enable - Positive X" dword="0" bits="4:4" type="bool" />
<field name="Cube Face Enable - Negative X" dword="0" bits="5:5" type="bool" />
<field name="Media Boundary Pixel Mode" dword="0" bits="7:6" type="uint">
<value name="NORMAL_MODE" value="0" />
<value name="PROGRESSIVE_FRAME" value="2" />
<value name="INTERLACED_FRAME" value="3" />
</field>
<field name="Render Cache Read Write Mode" dword="0" bits="8:8" type="uint">
<value name="WRITE_ONLY" value="0" />
<value name="READ_WRITE" value="1" />
</field>
<field name="MIP Map Layout Mode" dword="0" bits="10:10" type="uint">
<value name="MIPLAYOUT_BELOW" value="0" />
<value name="MIPLAYOUT_RIGHT" value="1" />
</field>
<field name="Vertical Line Stride Offset" dword="0" bits="11:11" type="uint" />
<field name="Vertical Line Stride" dword="0" bits="12:12" type="uint" />
<field name="Color Blend Enable" dword="0" bits="13:13" type="bool" />
<field name="Color Buffer Component Write Disables" dword="0" bits="17:14" type="uint">
<value name="WRITEDISABLE_ALPHA" value="8" />
<value name="WRITEDISABLE_RED" value="4" />
<value name="WRITEDISABLE_GREEN" value="2" />
<value name="WRITEDISABLE_BLUE" value="1" />
</field>
<field name="Surface Format" dword="0" bits="26:18" type="uint" />
<field name="Data Return Format" dword="0" bits="27:27" type="uint">
<value name="DATA_RETURN_FLOAT32" value="0" />
<value name="DATA_RETURN_S1.14" value="1" />
</field>
<field name="Surface Type" dword="0" bits="31:29" type="uint">
<value name="SURFTYPE_1D" value="0" />
<value name="SURFTYPE_2D" value="1" />
<value name="SURFTYPE_3D" value="2" />
<value name="SURFTYPE_CUBE" value="3" />
<value name="SURFTYPE_BUFFER" value="4" />
<value name="SURFTYPE_NULL" value="7" />
</field>
<field name="Surface Base Address" dword="1" bits="31:0" type="address" />
<field name="MIP Count / LOD" dword="2" bits="5:2" type="uint" />
<field name="Width" dword="2" bits="18:6" type="uint" />
<field name="Height" dword="2" bits="31:19" type="uint" />
<field name="Tile Walk" dword="3" bits="0:0" type="uint">
<value name="TILEWALK_XMAJOR" value="0" />
<value name="TILEWALK_YMAJOR" value="1" />
</field>
<field name="Tiled Surface" dword="3" bits="1:1" type="uint" />
<field name="Surface Pitch" dword="3" bits="19:3" type="uint" />
<field name="Depth" dword="3" bits="31:21" type="uint" />
<field name="Render Target View Extent" dword="4" bits="16:8" type="uint" />
<field name="Minimum Array Element" dword="4" bits="27:17" type="uint" />
<field name="Surface Min LOD" dword="4" bits="31:28" type="uint" />
<field name="Y Offset" dword="5" bits="23:20" type="uint" />
<field name="X Offset" dword="5" bits="31:25" type="uint" />
</struct>
<struct name="SAMPLER_STATE" length="4">
<field name="Shadow Function" dword="0" bits="2:0" type="uint" prefix="PREFILTEROP">
<value name="ALWAYS" value="0" />
<value name="NEVER" value="1" />
<value name="LESS" value="2" />
<value name="EQUAL" value="3" />
<value name="LEQUAL" value="4" />
<value name="GREATER" value="5" />
<value name="NOTEQUAL" value="6" />
<value name="GEQUAL" value="7" />
</field>
<field name="Texture LOD Bias" dword="0" bits="13:3" type="s4.6" />
<field name="Min Mode Filter" dword="0" bits="16:14" type="uint" prefix="MAPFILTER" />
<field name="Mag Mode Filter" dword="0" bits="19:17" type="uint" prefix="MAPFILTER">
<value name="NEAREST" value="0" />
<value name="LINEAR" value="1" />
<value name="ANISOTROPIC" value="2" />
<value name="MONO" value="6" />
</field>
<field name="Mip Mode Filter" dword="0" bits="21:20" type="uint" prefix="MIPFILTER">
<value name="NONE" value="0" />
<value name="NEAREST" value="1" />
<value name="LINEAR" value="3" />
</field>
<field name="Base Mip Level" dword="0" bits="26:22" type="u4.1" />
<field name="LOD PreClamp Enable" dword="0" bits="28:28" type="bool" />
<field name="Sampler Disable" dword="0" bits="31:31" type="bool" />
<field name="TCZ Address Control Mode" dword="1" bits="2:0" type="Texture Coordinate Mode" />
<field name="TCY Address Control Mode" dword="1" bits="5:3" type="Texture Coordinate Mode" />
<field name="TCX Address Control Mode" dword="1" bits="8:6" type="Texture Coordinate Mode" />
<field name="Cube Surface Control Mode" dword="1" bits="9:9" type="uint">
<value name="CUBECTRLMODE_PROGRAMMED" value="0" />
<value name="CUBECTRLMODE_OVERRIDE" value="1" />
</field>
<field name="Max LOD" dword="1" bits="21:12" type="u4.6" />
<field name="Min LOD" dword="1" bits="31:22" type="u4.6" />
<field name="Border Color Pointer" dword="2" bits="31:5" type="address" />
<field name="R Address Min Filter Rounding Enable" dword="3" bits="13:13" type="bool" />
<field name="R Address Mag Filter Rounding Enable" dword="3" bits="14:14" type="bool" />
<field name="V Address Min Filter Rounding Enable" dword="3" bits="15:15" type="bool" />
<field name="V Address Mag Filter Rounding Enable" dword="3" bits="16:16" type="bool" />
<field name="U Address Min Filter Rounding Enable" dword="3" bits="17:17" type="bool" />
<field name="U Address Mag Filter Rounding Enable" dword="3" bits="18:18" type="bool" />
<field name="Maximum Anisotropy" dword="3" bits="21:19" type="uint">
<value name="RATIO 2:1" value="0" />
<value name="RATIO 4:1" value="1" />
<value name="RATIO 6:1" value="2" />
<value name="RATIO 8:1" value="3" />
<value name="RATIO 10:1" value="4" />
<value name="RATIO 12:1" value="5" />
<value name="RATIO 14:1" value="6" />
<value name="RATIO 16:1" value="7" />
</field>
<field name="ChromaKey Mode" dword="3" bits="22:22" type="uint" prefix="KEYFILTER">
<value name="KILL_ON_ANY_MATCH" value="0" />
<value name="REPLACE_BLACK" value="1" />
</field>
<field name="ChromaKey Index" dword="3" bits="24:23" type="uint" />
<field name="ChromaKey Enable" dword="3" bits="25:25" type="bool" />
<field name="Monochrome Filter Width" dword="3" bits="28:26" type="uint" />
<field name="Monochrome Filter Height" dword="3" bits="31:29" type="uint" />
</struct>
<struct name="SF_STATE" length="8">
<field name="GRF Register Count" dword="0" bits="3:1" type="uint" />
<field name="Kernel Start Pointer" dword="0" bits="31:6" type="address" />
<field name="Software Exception Enable" dword="1" bits="7:7" type="bool" />
<field name="Mask Stack Exception Enable" dword="1" bits="11:11" type="bool" />
<field name="Illegal Opcode Exception Enable" dword="1" bits="13:13" type="bool" />
<field name="Floating Point Mode" dword="1" bits="16:16" type="uint" prefix="FLOATING_POINT_MODE">
<value name="IEEE-754" value="0" />
<value name="Alternate" value="1" />
</field>
<field name="Thread Priority" dword="1" bits="17:17" type="uint">
<value name="Normal Priority" value="0" />
<value name="High Priority" value="1" />
</field>
<field name="Binding Table Entry Count" dword="1" bits="25:18" type="uint" />
<field name="Single Program Flow" dword="1" bits="31:31" type="bool" />
<field name="Per-Thread Scratch Space" dword="2" bits="3:0" type="uint" />
<field name="Scratch Space Base Pointer" dword="2" bits="31:10" type="address" />
<field name="Dispatch GRF Start Register For URB Data" dword="3" bits="3:0" type="uint" />
<field name="Vertex URB Entry Read Offset" dword="3" bits="9:4" type="uint" />
<field name="Vertex URB Entry Read Length" dword="3" bits="16:11" type="uint" />
<field name="Constant URB Entry Read Offset" dword="3" bits="23:18" type="uint" />
<field name="Constant URB Entry Read Length" dword="3" bits="30:25" type="uint" />
<field name="Statistics Enable" dword="4" bits="10:10" type="bool" />
<field name="Number of URB Entries" dword="4" bits="18:11" type="uint" />
<field name="URB Entry Allocation Size" dword="4" bits="23:19" type="uint" />
<field name="Maximum Number of Threads" dword="4" bits="30:25" type="uint" />
<field name="Front Winding" dword="5" bits="0:0" type="uint">
<value name="FRONTWINDING_CW" value="0" />
<value name="FRONTWINDING_CCW" value="1" />
</field>
<field name="Viewport Transform Enable" dword="5" bits="1:1" type="bool" />
<field name="Setup Viewport State Offset" dword="5" bits="31:5" type="address" />
<field name="Destination Origin Vertical Bias" dword="6" bits="12:9" type="u0.4" />
<field name="Destination Origin Horizontal Bias" dword="6" bits="16:13" type="u0.4" />
<field name="Scissor Rectangle Enable" dword="6" bits="17:17" type="bool" />
<field name="2x2 Pixel Triangle Filter Disable" dword="6" bits="18:18" type="bool" />
<field name="Zero Pixel Triangle Filter Disable" dword="6" bits="19:19" type="bool" />
<field name="Point Rasterization Rule" dword="6" bits="21:20" type="uint">
<value name="RASTRULE_UPPER_LEFT" value="0" />
<value name="RASTRULE_UPPER_RIGHT" value="1" />
</field>
<field name="Line End Cap Antialiasing Region Width" dword="6" bits="23:22" type="uint">
<value name="0.5 pixels" value="0" />
<value name="1.0 pixels" value="1" />
<value name="2.0 pixels" value="2" />
<value name="4.0 pixels" value="3" />
</field>
<field name="Line Width" dword="6" bits="27:24" type="u3.1" />
<field name="Fast Scissor Clip Disable" dword="6" bits="28:28" type="bool" />
<field name="Cull Mode" dword="6" bits="30:29" type="uint" prefix="CULLMODE">
<value name="BOTH" value="0" />
<value name="NONE" value="1" />
<value name="FRONT" value="2" />
<value name="BACK" value="3" />
</field>
<field name="Antialiasing Enable" dword="6" bits="31:31" type="bool" />
<field name="Point Width" dword="7" bits="10:0" type="u8.3" />
<field name="Point Width Source" dword="7" bits="11:11" type="uint">
<value name="Vertex" value="0" />
<value name="State" value="1" />
</field>
<field name="Vertex Sub Pixel Precision Select" dword="7" bits="12:12" type="uint">
<value name="8 Sub-Pixel Precision Bits" value="0" />
<value name="4 Sub-Pixel Precision Bits" value="1" />
</field>
<field name="Sprite Point Enable" dword="7" bits="13:13" type="bool" />
<field name="AA Line Distance Mode" dword="7" bits="14:14" type="uint" prefix="AALINEDISTANCE">
<value name="MANHATTAN" value="0" />
<value name="TRUE" value="1" />
</field>
<field name="Triangle Fan Provoking Vertex Select" dword="7" bits="26:25" type="uint">
<value name="Vertex 0" value="0" />
<value name="Vertex 1" value="1" />
<value name="Vertex 2" value="2" />
</field>
<field name="Line Strip/List Provoking Vertex Select" dword="7" bits="28:27" type="uint">
<value name="Vertex 0" value="0" />
<value name="Vertex 1" value="1" />
</field>
<field name="Triangle Strip/List Provoking Vertex Select" dword="7" bits="30:29" type="uint">
<value name="Vertex 0" value="0" />
<value name="Vertex 1" value="1" />
<value name="Vertex 2" value="2" />
</field>
<field name="Last Pixel Enable" dword="7" bits="31:31" type="bool" />
</struct>
<struct name="WM_STATE" length="8">
<field name="GRF Register Count 0" dword="0" bits="3:1" type="uint" />
<field name="Kernel Start Pointer 0" dword="0" bits="31:6" type="address" />
<field name="Software Exception Enable" dword="1" bits="1:1" type="bool" />
<field name="Mask Stack Exception Enable" dword="1" bits="2:2" type="bool" />
<field name="Illegal Opcode Exception Enable" dword="1" bits="4:4" type="bool" />
<field name="Depth Coefficient URB Read Offset" dword="1" bits="13:8" type="uint" />
<field name="Floating Point Mode" dword="1" bits="16:16" type="uint" prefix="FLOATING_POINT_MODE">
<value name="IEEE-754" value="0" />
<value name="Alternate" value="1" />
</field>
<field name="Thread Priority" dword="1" bits="17:17" type="uint">
<value name="Normal" value="0" />
<value name="High" value="1" />
</field>
<field name="Binding Table Entry Count" dword="1" bits="25:18" type="uint" />
<field name="Single Program Flow" dword="1" bits="31:31" type="bool" />
<field name="Per-Thread Scratch Space" dword="2" bits="3:0" type="uint" />
<field name="Scratch Space Base Pointer" dword="2" bits="31:10" type="address" />
<field name="Dispatch GRF Start Register For Constant/Setup Data 0" dword="3" bits="3:0" type="uint" />
<field name="Setup URB Entry Read Offset" dword="3" bits="9:4" type="uint" />
<field name="Setup URB Entry Read Length" dword="3" bits="16:11" type="uint" />
<field name="Constant URB Entry Read Offset" dword="3" bits="23:18" type="uint" />
<field name="Constant URB Entry Read Length" dword="3" bits="30:25" type="uint" />
<field name="Statistics Enable" dword="4" bits="0:0" type="bool" />
<field name="Sampler Count" dword="4" bits="4:2" type="uint" />
<field name="Sampler State Pointer" dword="4" bits="31:5" type="address" />
<field name="8 Pixel Dispatch Enable" dword="5" bits="0:0" type="bool" />
<field name="16 Pixel Dispatch Enable" dword="5" bits="1:1" type="bool" />
<field name="32 Pixel Dispatch Enable" dword="5" bits="2:2" type="bool" />
<field name="Contiguous 32 Pixel Dispatch Enable" dword="5" bits="3:3" type="bool" />
<field name="Contiguous 64 Pixel Dispatch Enable" dword="5" bits="4:4" type="bool" />
<field name="Legacy Global Depth Bias Enable" dword="5" bits="10:10" type="bool" />
<field name="Line Stipple Enable" dword="5" bits="11:11" type="bool" />
<field name="Global Depth Offset Enable" dword="5" bits="12:12" type="bool" />
<field name="Polygon Stipple Enable" dword="5" bits="13:13" type="bool" />
<field name="Line Antialiasing Region Width" dword="5" bits="15:14" type="uint">
<value name="0.5 pixels" value="0" />
<value name="1.0 pixels" value="1" />
<value name="2.0 pixels" value="2" />
<value name="4.0 pixels" value="3" />
</field>
<field name="Line End Cap Antialiasing Region Width" dword="5" bits="17:16" type="uint">
<value name="0.5 pixels" value="0" />
<value name="1.0 pixels" value="1" />
<value name="2.0 pixels" value="2" />
<value name="4.0 pixels" value="3" />
</field>
<field name="Early Depth Test Enable" dword="5" bits="18:18" type="bool" />
<field name="Thread Dispatch Enable" dword="5" bits="19:19" type="bool" />
<field name="Pixel Shader Uses Source Depth" dword="5" bits="20:20" type="bool" />
<field name="Pixel Shader Computed Depth" dword="5" bits="21:21" type="bool" />
<field name="Pixel Shader Kills Pixel" dword="5" bits="22:22" type="bool" />
<field name="Legacy Diamond Line Rasterization" dword="5" bits="23:23" type="bool" />
<field name="Maximum Number of Threads" dword="5" bits="31:25" type="uint" />
<field name="Global Depth Offset Constant" dword="6" bits="31:0" type="float" />
<field name="Global Depth Offset Scale" dword="7" bits="31:0" type="float" />
</struct>
<instruction name="3DPRIMITIVE" bias="2" length="6" engine="render">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="4" />
<field name="Indirect Vertex Count" dword="0" bits="9:9" type="uint" />
<field name="Primitive Topology Type" dword="0" bits="14:10" type="3D_Prim_Topo_Type" />
<field name="Vertex Access Type" dword="0" bits="15:15" type="uint">
<value name="SEQUENTIAL" value="0" />
<value name="RANDOM" value="1" />
</field>
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="0" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="3" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="3" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
<field name="Vertex Count Per Instance" dword="1" bits="31:0" type="uint" />
<field name="Start Vertex Location" dword="2" bits="31:0" type="uint" />
<field name="Instance Count" dword="3" bits="31:0" type="uint" />
<field name="Start Instance Location" dword="4" bits="31:0" type="uint" />
<field name="Base Vertex Location" dword="5" bits="31:0" type="int" />
</instruction>
<instruction name="3DSTATE_AA_LINE_PARAMETERS" bias="2" length="3" engine="render">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="1" />
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="10" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="1" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="3" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
<field name="AA Coverage Slope" dword="1" bits="7:0" type="u0.8" />
<field name="AA Coverage Bias" dword="1" bits="23:16" type="u0.8" />
<field name="AA Coverage EndCap Slope" dword="2" bits="7:0" type="u0.8" />
<field name="AA Coverage EndCap Bias" dword="2" bits="23:16" type="u0.8" />
</instruction>
<instruction name="3DSTATE_DEPTH_BUFFER" bias="2" length="6" engine="render">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="4" />
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="5" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="1" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="3" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
<field name="Surface Pitch" dword="1" bits="16:0" type="uint" />
<field name="Surface Format" dword="1" bits="20:18" type="uint">
<value name="D32_FLOAT_S8X24_UINT" value="0" />
<value name="D32_FLOAT" value="1" />
<value name="D24_UNORM_S8_UINT" value="2" />
<value name="D24_UNORM_X8_UINT" value="3" />
<value name="D16_UNORM" value="5" />
</field>
<field name="Software Tiled Rendering Mode" dword="1" bits="24:23" type="uint">
<value name="NORMAL" value="0" />
<value name="STR1" value="1" />
<value name="STR2" value="3" />
</field>
<field name="Depth Buffer Coordinate Offset Disable" dword="1" bits="25:25" type="bool" />
<field name="Tile Walk" dword="1" bits="26:26" type="uint">
<value name="TILEWALK_YMAJOR" value="1" />
</field>
<field name="Tiled Surface" dword="1" bits="27:27" type="bool" />
<field name="Surface Type" dword="1" bits="31:29" type="uint">
<value name="SURFTYPE_1D" value="0" />
<value name="SURFTYPE_2D" value="1" />
<value name="SURFTYPE_3D" value="2" />
<value name="SURFTYPE_CUBE" value="3" />
<value name="SURFTYPE_NULL" value="7" />
</field>
<field name="Surface Base Address" dword="2" bits="31:0" type="address" />
<field name="MIP Map Layout Mode" dword="3" bits="1:1" type="uint">
<value name="MIPLAYOUT_BELOW" value="0" />
<value name="MIPLAYOUT_RIGHT" value="1" />
</field>
<field name="LOD" dword="3" bits="5:2" type="uint" />
<field name="Width" dword="3" bits="18:6" type="uint" />
<field name="Height" dword="3" bits="31:19" type="uint">
<value name="SURFTYPE_1D: must be zero" value="0" />
</field>
<field name="Render Target View Extent" dword="4" bits="9:1" type="uint" />
<field name="Minimum Array Element" dword="4" bits="20:10" type="uint" />
<field name="Depth" dword="4" bits="31:21" type="uint">
<value name="SURFTYPE_CUBE: must be zero" value="0" />
</field>
<field name="Depth Coordinate Offset X" dword="5" bits="15:0" type="int" />
<field name="Depth Coordinate Offset Y" dword="5" bits="31:16" type="int" />
</instruction>
<instruction name="3DSTATE_LINE_STIPPLE" bias="2" length="3" engine="render">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="1" />
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="8" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="1" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="3" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
<field name="Line Stipple Pattern" dword="1" bits="15:0" type="uint" />
<field name="Current Stipple Index" dword="1" bits="19:16" type="uint" />
<field name="Current Repeat Counter" dword="1" bits="29:21" type="uint" />
<field name="Modify Enable (Current Repeat Counter, Current Stipple Index)" dword="1" bits="31:31" type="bool" />
<field name="Line Stipple Repeat Count" dword="2" bits="8:0" type="uint" />
<field name="Line Stipple Inverse Repeat Count" dword="2" bits="31:16" type="u1.13" />
</instruction>
<instruction name="3DSTATE_VF_STATISTICS" bias="1" length="1" engine="render">
<field name="Statistics Enable" dword="0" bits="0:0" type="bool" />
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="11" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="0" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="1" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
</instruction>
<instruction name="PIPELINE_SELECT" bias="1" length="1" engine="render">
<field name="Pipeline Selection" dword="0" bits="1:0" type="uint">
<value name="3D" value="0" />
<value name="Media" value="1" />
</field>
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="4" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="1" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="1" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
</instruction>
<instruction name="PIPE_CONTROL" bias="2" length="4" engine="render">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="2" />
<field name="Notify Enable" dword="0" bits="8:8" type="bool" />
<field name="Indirect State Pointers Disable" dword="0" bits="9:9" type="bool" />
<field name="Texture Cache Flush Enable" dword="0" bits="10:10" type="bool" />
<field name="Instruction Cache Invalidate Enable" dword="0" bits="11:11" type="bool" />
<field name="Write Cache Flush" dword="0" bits="12:12" type="bool" />
<field name="Depth Stall Enable" dword="0" bits="13:13" type="bool" />
<field name="Post Sync Operation" dword="0" bits="15:14" type="uint">
<value name="No Write" value="0" />
<value name="Write Immediate Data" value="1" />
<value name="Write PS Depth Count" value="2" />
<value name="Write Timestamp" value="3" />
</field>
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="0" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="2" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="3" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
<field name="Destination Address Type" dword="1" bits="2:2" type="uint" prefix="DAT">
<value name="PGTT" value="0" />
<value name="GGTT" value="1" />
</field>
<field name="Address" dword="1" bits="31:3" type="address" />
<field name="Immediate Data" dword="2" bits="63:0" type="uint" />
</instruction>
<instruction name="URB_FENCE" bias="2" length="3" engine="render">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="1" />
<field name="VS Unit URB Reallocation Request" dword="0" bits="8:8" type="bool" />
<field name="GS Unit URB Reallocation Request" dword="0" bits="9:9" type="bool" />
<field name="CLIP Unit URB Reallocation Request" dword="0" bits="10:10" type="bool" />
<field name="SF Unit URB Reallocation Request" dword="0" bits="11:11" type="bool" />
<field name="VFE Unit URB Reallocation Request" dword="0" bits="12:12" type="bool" />
<field name="CS Unit URB Reallocation Request" dword="0" bits="13:13" type="bool" />
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="0" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="0" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="0" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
<field name="VS Fence" dword="1" bits="9:0" type="uint" />
<field name="GS Fence" dword="1" bits="19:10" type="uint" />
<field name="CLIP Fence" dword="1" bits="29:20" type="uint" />
<field name="SF Fence" dword="2" bits="9:0" type="uint" />
<field name="VFE Fence" dword="2" bits="19:10" type="uint" />
<field name="CS Fence" dword="2" bits="30:20" type="uint" />
</instruction>
</genxml>
src/intel/genxml/gen50.xml
+648
View File
@@ -0,0 +1,648 @@
<?xml version='1.0' encoding='utf-8'?>
<genxml name="ILK" gen="5">
<import name="gen45.xml" />
<struct name="CLIP_STATE" length="11">
<field name="GRF Register Count" dword="0" bits="3:1" type="uint" />
<field name="Kernel Start Pointer" dword="0" bits="31:6" type="offset" />
<field name="Software Exception Enable" dword="1" bits="7:7" type="bool" />
<field name="Mask Stack Exception Enable" dword="1" bits="11:11" type="bool" />
<field name="Illegal Opcode Exception Enable" dword="1" bits="13:13" type="bool" />
<field name="Floating Point Mode" dword="1" bits="16:16" type="uint" prefix="FLOATING_POINT_MODE">
<value name="IEEE-754" value="0" />
<value name="Alternate" value="1" />
</field>
<field name="Thread Priority" dword="1" bits="17:17" type="uint">
<value name="Normal Priority" value="0" />
<value name="High Priority" value="1" />
</field>
<field name="Binding Table Entry Count" dword="1" bits="25:18" type="uint" />
<field name="Single Program Flow" dword="1" bits="31:31" type="bool" />
<field name="Per-Thread Scratch Space" dword="2" bits="3:0" type="uint" />
<field name="Scratch Space Base Pointer" dword="2" bits="31:10" type="address" />
<field name="Dispatch GRF Start Register For URB Data" dword="3" bits="3:0" type="uint" />
<field name="Vertex URB Entry Read Offset" dword="3" bits="9:4" type="uint" />
<field name="Vertex URB Entry Read Length" dword="3" bits="16:11" type="uint" />
<field name="Constant URB Entry Read Offset" dword="3" bits="23:18" type="uint" />
<field name="Constant URB Entry Read Length" dword="3" bits="30:25" type="uint" />
<field name="Number of URB Entries" dword="4" bits="18:11" type="uint" />
<field name="URB Entry Allocation Size" dword="4" bits="23:19" type="uint" />
<field name="Maximum Number of Threads" dword="4" bits="30:25" type="uint" />
<field name="Clip Mode" dword="5" bits="15:13" type="uint" prefix="CLIPMODE">
<value name="NORMAL" value="0" />
<value name="ALL" value="1" />
<value name="CLIP_NON_REJECTED" value="2" />
<value name="REJECT_ALL" value="3" />
<value name="ACCEPT_ALL" value="4" />
</field>
<field name="UserClipDistance ClipTest Enable Bitmask" dword="5" bits="23:16" type="uint" />
<field name="UserClipFlags MustClip Enable" dword="5" bits="24:24" type="bool" />
<field name="Negative W ClipTest Enable" dword="5" bits="25:25" type="bool" />
<field name="Guardband ClipTest Enable" dword="5" bits="26:26" type="bool" />
<field name="Viewport Z ClipTest Enable" dword="5" bits="27:27" type="bool" />
<field name="Viewport XY ClipTest Enable" dword="5" bits="28:28" type="bool" />
<field name="Vertex Position Space" dword="5" bits="29:29" type="uint" prefix="VPOS">
<value name="NDCSPACE" value="0" />
<value name="SCREENSPACE" value="1" />
</field>
<field name="API Mode" dword="5" bits="30:30" type="uint" prefix="APIMODE">
<value name="OGL" value="0" />
<value name="D3D" value="1" />
</field>
<field name="Clipper Viewport State Pointer" dword="6" bits="31:5" type="address" />
<field name="Screen Space Viewport X Min" dword="7" bits="31:0" type="float" />
<field name="Screen Space Viewport X Max" dword="8" bits="31:0" type="float" />
<field name="Screen Space Viewport Y Min" dword="9" bits="31:0" type="float" />
<field name="Screen Space Viewport Y Max" dword="10" bits="31:0" type="float" />
</struct>
<struct name="GS_STATE" length="7">
<field name="GRF Register Count" dword="0" bits="3:1" type="uint" />
<field name="Kernel Start Pointer" dword="0" bits="31:6" type="offset" />
<field name="Software Exception Enable" dword="1" bits="7:7" type="bool" />
<field name="Mask Stack Exception Enable" dword="1" bits="11:11" type="bool" />
<field name="Illegal Opcode Exception Enable" dword="1" bits="13:13" type="bool" />
<field name="Floating Point Mode" dword="1" bits="16:16" type="uint" prefix="FLOATING_POINT_MODE">
<value name="IEEE-754" value="0" />
<value name="Alternate" value="1" />
</field>
<field name="Binding Table Entry Count" dword="1" bits="25:18" type="uint" />
<field name="Single Program Flow" dword="1" bits="31:31" type="bool" />
<field name="Per-Thread Scratch Space" dword="2" bits="3:0" type="uint" />
<field name="Scratch Space Base Pointer" dword="2" bits="31:10" type="address" />
<field name="Dispatch GRF Start Register For URB Data" dword="3" bits="3:0" type="uint" />
<field name="Vertex URB Entry Read Offset" dword="3" bits="9:4" type="uint" />
<field name="Vertex URB Entry Read Length" dword="3" bits="16:11" type="uint" />
<field name="Constant URB Entry Read Offset" dword="3" bits="23:18" type="uint" />
<field name="Constant URB Entry Read Length" dword="3" bits="30:25" type="uint" />
<field name="Rendering Enabled" dword="4" bits="8:8" type="bool" />
<field name="SO Statistics Enable" dword="4" bits="9:9" type="bool" />
<field name="GS Statistics Enable" dword="4" bits="10:10" type="bool" />
<field name="Number of URB Entries" dword="4" bits="18:11" type="uint" />
<field name="URB Entry Allocation Size" dword="4" bits="23:19" type="uint" />
<field name="Maximum Number of Threads" dword="4" bits="30:25" type="uint" />
<field name="Sampler Count" dword="5" bits="2:0" type="uint" />
<field name="Sampler State Pointer" dword="5" bits="31:5" type="address" />
<field name="Maximum VPIndex" dword="6" bits="3:0" type="uint" />
<field name="Reorder Enable" dword="6" bits="30:30" type="bool" />
</struct>
<struct name="MEMORY_OBJECT_CONTROL_STATE" length="1">
<field name="Cacheability Control" dword="0" bits="1:0" type="uint" />
<field name="Graphics Data Type (GFDT)" dword="0" bits="2:2" type="uint" />
<field name="Encrypted Data" dword="0" bits="3:3" type="bool" />
</struct>
<struct name="RENDER_SURFACE_STATE" length="6">
<field name="Cube Face Enable - Positive Z" dword="0" bits="0:0" type="bool" />
<field name="Cube Face Enable - Negative Z" dword="0" bits="1:1" type="bool" />
<field name="Cube Face Enable - Positive Y" dword="0" bits="2:2" type="bool" />
<field name="Cube Face Enable - Negative Y" dword="0" bits="3:3" type="bool" />
<field name="Cube Face Enable - Positive X" dword="0" bits="4:4" type="bool" />
<field name="Cube Face Enable - Negative X" dword="0" bits="5:5" type="bool" />
<field name="Media Boundary Pixel Mode" dword="0" bits="7:6" type="uint">
<value name="NORMAL_MODE" value="0" />
</field>
<field name="Render Cache Read Write Mode" dword="0" bits="8:8" type="uint">
<value name="WRITE_ONLY" value="0" />
<value name="READ_WRITE" value="1" />
</field>
<field name="Cube Map Corner Mode" dword="0" bits="9:9" type="uint">
<value name="CUBE_REPLICATE" value="0" />
<value name="CUBE_AVERAGE" value="1" />
</field>
<field name="MIP Map Layout Mode" dword="0" bits="10:10" type="uint">
<value name="MIPLAYOUT_BELOW" value="0" />
<value name="MIPLAYOUT_RIGHT" value="1" />
</field>
<field name="Vertical Line Stride Offset" dword="0" bits="11:11" type="uint" />
<field name="Vertical Line Stride" dword="0" bits="12:12" type="uint" />
<field name="Color Blend Enable" dword="0" bits="13:13" type="bool" />
<field name="Color Buffer Component Write Disables" dword="0" bits="17:14" type="uint">
<value name="WRITEDISABLE_ALPHA" value="8" />
<value name="WRITEDISABLE_RED" value="4" />
<value name="WRITEDISABLE_GREEN" value="2" />
<value name="WRITEDISABLE_BLUE" value="1" />
</field>
<field name="Surface Format" dword="0" bits="26:18" type="uint" />
<field name="Data Return Format" dword="0" bits="27:27" type="uint">
<value name="DATA_RETURN_FLOAT32" value="0" />
<value name="DATA_RETURN_S1.14" value="1" />
</field>
<field name="Surface Type" dword="0" bits="31:29" type="uint">
<value name="SURFTYPE_1D" value="0" />
<value name="SURFTYPE_2D" value="1" />
<value name="SURFTYPE_3D" value="2" />
<value name="SURFTYPE_CUBE" value="3" />
<value name="SURFTYPE_BUFFER" value="4" />
<value name="SURFTYPE_NULL" value="7" />
</field>
<field name="Surface Base Address" dword="1" bits="31:0" type="address" />
<field name="Render Target Rotation" dword="2" bits="1:0" type="uint">
<value name="RTROTATE_0DEG" value="0" />
<value name="RTROTATE_90DEG" value="1" />
<value name="RTROTATE_270DEG" value="3" />
</field>
<field name="MIP Count / LOD" dword="2" bits="5:2" type="uint" />
<field name="Width" dword="2" bits="18:6" type="uint" />
<field name="Height" dword="2" bits="31:19" type="uint" />
<field name="Tile Walk" dword="3" bits="0:0" type="uint">
<value name="TILEWALK_XMAJOR" value="0" />
<value name="TILEWALK_YMAJOR" value="1" />
</field>
<field name="Tiled Surface" dword="3" bits="1:1" type="uint" />
<field name="Surface Pitch" dword="3" bits="19:3" type="uint" />
<field name="Depth" dword="3" bits="31:21" type="uint" />
<field name="Render Target View Extent" dword="4" bits="16:8" type="uint" />
<field name="Minimum Array Element" dword="4" bits="27:17" type="uint" />
<field name="Surface Min LOD" dword="4" bits="31:28" type="uint" />
<field name="Y Offset" dword="5" bits="23:20" type="uint" />
<field name="X Offset" dword="5" bits="31:25" type="uint" />
</struct>
<struct name="SAMPLER_BORDER_COLOR_STATE" length="12">
<field name="Border Color Unorm Red" dword="0" bits="7:0" type="uint" />
<field name="Border Color Unorm Green" dword="0" bits="15:8" type="uint" />
<field name="Border Color Unorm Blue" dword="0" bits="23:16" type="uint" />
<field name="Border Color Unorm Alpha" dword="0" bits="31:24" type="uint" />
<field name="Border Color Float Red" dword="1" bits="31:0" type="float" />
<field name="Border Color Float Green" dword="2" bits="31:0" type="float" />
<field name="Border Color Float Blue" dword="3" bits="31:0" type="float" />
<field name="Border Color Float Alpha" dword="4" bits="31:0" type="float" />
<field name="Border Color Float16 Red" dword="5" bits="15:0" type="uint" />
<field name="Border Color Float16 Green" dword="5" bits="31:16" type="uint" />
<field name="Border Color Float16 Blue" dword="6" bits="15:0" type="uint" />
<field name="Border Color Float16 Alpha" dword="6" bits="31:16" type="uint" />
<field name="Border Color Unorm16 Red" dword="7" bits="15:0" type="uint" />
<field name="Border Color Unorm16 Green" dword="7" bits="31:16" type="uint" />
<field name="Border Color Unorm16 Blue" dword="8" bits="15:0" type="uint" />
<field name="Border Color Unorm16 Alpha" dword="8" bits="31:16" type="uint" />
<field name="Border Color Snorm16 Red" dword="9" bits="15:0" type="int" />
<field name="Border Color Snorm16 Green" dword="9" bits="31:16" type="int" />
<field name="Border Color Snorm16 Blue" dword="10" bits="15:0" type="int" />
<field name="Border Color Snorm16 Alpha" dword="10" bits="31:16" type="int" />
<field name="Border Color Snorm8 Red" dword="11" bits="7:0" type="int" />
<field name="Border Color Snorm8 Green" dword="11" bits="15:8" type="int" />
<field name="Border Color Snorm8 Blue" dword="11" bits="23:16" type="int" />
<field name="Border Color Snorm8 Alpha" dword="11" bits="31:24" type="int" />
</struct>
<struct name="SF_STATE" length="8">
<field name="GRF Register Count" dword="0" bits="3:1" type="uint" />
<field name="Kernel Start Pointer" dword="0" bits="31:6" type="offset" />
<field name="Software Exception Enable" dword="1" bits="7:7" type="bool" />
<field name="Mask Stack Exception Enable" dword="1" bits="11:11" type="bool" />
<field name="Illegal Opcode Exception Enable" dword="1" bits="13:13" type="bool" />
<field name="Floating Point Mode" dword="1" bits="16:16" type="uint" prefix="FLOATING_POINT_MODE">
<value name="IEEE-754" value="0" />
<value name="Alternate" value="1" />
</field>
<field name="Thread Priority" dword="1" bits="17:17" type="uint">
<value name="Normal Priority" value="0" />
<value name="High Priority" value="1" />
</field>
<field name="Binding Table Entry Count" dword="1" bits="25:18" type="uint" />
<field name="Single Program Flow" dword="1" bits="31:31" type="bool" />
<field name="Per-Thread Scratch Space" dword="2" bits="3:0" type="uint" />
<field name="Scratch Space Base Pointer" dword="2" bits="31:10" type="address" />
<field name="Dispatch GRF Start Register For URB Data" dword="3" bits="3:0" type="uint" />
<field name="Vertex URB Entry Read Offset" dword="3" bits="9:4" type="uint" />
<field name="Vertex URB Entry Read Length" dword="3" bits="16:11" type="uint" />
<field name="Constant URB Entry Read Offset" dword="3" bits="23:18" type="uint" />
<field name="Constant URB Entry Read Length" dword="3" bits="30:25" type="uint" />
<field name="Number of URB Entries" dword="4" bits="18:11" type="uint" />
<field name="URB Entry Allocation Size" dword="4" bits="23:19" type="uint" />
<field name="Maximum Number of Threads" dword="4" bits="30:25" type="uint" />
<field name="Front Winding" dword="5" bits="0:0" type="uint">
<value name="FRONTWINDING_CW" value="0" />
<value name="FRONTWINDING_CCW" value="1" />
</field>
<field name="Viewport Transform Enable" dword="5" bits="1:1" type="bool" />
<field name="Setup Viewport State Offset" dword="5" bits="31:5" type="address" />
<field name="Destination Origin Vertical Bias" dword="6" bits="12:9" type="u0.4" />
<field name="Destination Origin Horizontal Bias" dword="6" bits="16:13" type="u0.4" />
<field name="Scissor Rectangle Enable" dword="6" bits="17:17" type="bool" />
<field name="2x2 Pixel Triangle Filter Disable" dword="6" bits="18:18" type="bool" />
<field name="Zero Pixel Triangle Filter Disable" dword="6" bits="19:19" type="bool" />
<field name="Point Rasterization Rule" dword="6" bits="21:20" type="uint">
<value name="RASTRULE_UPPER_LEFT" value="0" />
<value name="RASTRULE_UPPER_RIGHT" value="1" />
</field>
<field name="Line End Cap Antialiasing Region Width" dword="6" bits="23:22" type="uint">
<value name="0.5 pixels" value="0" />
<value name="1.0 pixels" value="1" />
<value name="2.0 pixels" value="2" />
<value name="4.0 pixels" value="3" />
</field>
<field name="Line Width" dword="6" bits="27:24" type="u3.1" />
<field name="Fast Scissor Clip Disable" dword="6" bits="28:28" type="bool" />
<field name="Cull Mode" dword="6" bits="30:29" type="uint" prefix="CULLMODE">
<value name="BOTH" value="0" />
<value name="NONE" value="1" />
<value name="FRONT" value="2" />
<value name="BACK" value="3" />
</field>
<field name="Antialiasing Enable" dword="6" bits="31:31" type="bool" />
<field name="Point Width" dword="7" bits="10:0" type="u8.3" />
<field name="Point Width Source" dword="7" bits="11:11" type="uint">
<value name="Vertex" value="0" />
<value name="State" value="1" />
</field>
<field name="Vertex Sub Pixel Precision Select" dword="7" bits="12:12" type="uint">
<value name="8 Sub-Pixel Precision Bits" value="0" />
<value name="4 Sub-Pixel Precision Bits" value="1" />
</field>
<field name="Sprite Point Enable" dword="7" bits="13:13" type="bool" />
<field name="AA Line Distance Mode" dword="7" bits="14:14" type="uint" prefix="AALINEDISTANCE">
<value name="MANHATTAN" value="0" />
<value name="TRUE" value="1" />
</field>
<field name="Triangle Fan Provoking Vertex Select" dword="7" bits="26:25" type="uint">
<value name="Vertex 0" value="0" />
<value name="Vertex 1" value="1" />
<value name="Vertex 2" value="2" />
</field>
<field name="Line Strip/List Provoking Vertex Select" dword="7" bits="28:27" type="uint">
<value name="Vertex 0" value="0" />
<value name="Vertex 1" value="1" />
</field>
<field name="Triangle Strip/List Provoking Vertex Select" dword="7" bits="30:29" type="uint">
<value name="Vertex 0" value="0" />
<value name="Vertex 1" value="1" />
<value name="Vertex 2" value="2" />
</field>
<field name="Last Pixel Enable" dword="7" bits="31:31" type="bool" />
</struct>
<struct name="VERTEX_BUFFER_STATE" length="4">
<field name="Buffer Pitch" dword="0" bits="11:0" type="uint" />
<field name="Null Vertex Buffer" dword="0" bits="13:13" type="bool" />
<field name="Buffer Access Type" dword="0" bits="26:26" type="uint">
<value name="VERTEXDATA" value="0" />
<value name="INSTANCEDATA" value="1" />
</field>
<field name="Vertex Buffer Index" dword="0" bits="31:27" type="uint" />
<field name="Buffer Starting Address" dword="1" bits="31:0" type="address" />
<field name="End Address" dword="2" bits="31:0" type="address" />
<field name="Instance Data Step Rate" dword="3" bits="31:0" type="uint" />
</struct>
<struct name="VS_STATE" length="7">
<field name="GRF Register Count" dword="0" bits="3:1" type="uint" />
<field name="Kernel Start Pointer" dword="0" bits="31:6" type="offset" />
<field name="Software Exception Enable" dword="1" bits="7:7" type="bool" />
<field name="Mask Stack Exception Enable" dword="1" bits="11:11" type="bool" />
<field name="Illegal Opcode Exception Enable" dword="1" bits="13:13" type="bool" />
<field name="Floating Point Mode" dword="1" bits="16:16" type="uint" prefix="FLOATING_POINT_MODE">
<value name="IEEE-754" value="0" />
<value name="Alternate" value="1" />
</field>
<field name="Thread Priority" dword="1" bits="17:17" type="uint">
<value name="Normal Priority" value="0" />
<value name="High Priority" value="1" />
</field>
<field name="Binding Table Entry Count" dword="1" bits="25:18" type="uint" />
<field name="Single Program Flow" dword="1" bits="31:31" type="bool" />
<field name="Per-Thread Scratch Space" dword="2" bits="3:0" type="uint" />
<field name="Scratch Space Base Pointer" dword="2" bits="31:10" type="address" />
<field name="Dispatch GRF Start Register For URB Data" dword="3" bits="3:0" type="uint" />
<field name="Vertex URB Entry Read Offset" dword="3" bits="9:4" type="uint" />
<field name="Vertex URB Entry Read Length" dword="3" bits="16:11" type="uint" />
<field name="Constant URB Entry Read Offset" dword="3" bits="23:18" type="uint" />
<field name="Constant URB Entry Read Length" dword="3" bits="30:25" type="uint" />
<field name="Statistics Enable" dword="4" bits="10:10" type="bool" />
<field name="Number of URB Entries" dword="4" bits="18:11" type="uint" />
<field name="URB Entry Allocation Size" dword="4" bits="23:19" type="uint" />
<field name="Maximum Number of Threads" dword="4" bits="30:25" type="uint" />
<field name="Sampler Count" dword="5" bits="2:0" type="uint" />
<field name="Sampler State Pointer" dword="5" bits="31:5" type="address" />
<field name="Enable" dword="6" bits="0:0" type="bool" />
<field name="Vertex Cache Disable" dword="6" bits="1:1" type="bool" />
</struct>
<struct name="WM_STATE" length="11">
<field name="GRF Register Count 0" dword="0" bits="3:1" type="uint" />
<field name="Kernel Start Pointer 0" dword="0" bits="31:6" type="offset" />
<field name="Software Exception Enable" dword="1" bits="1:1" type="bool" />
<field name="Mask Stack Exception Enable" dword="1" bits="2:2" type="bool" />
<field name="Illegal Opcode Exception Enable" dword="1" bits="4:4" type="bool" />
<field name="Depth Coefficient URB Read Offset" dword="1" bits="13:8" type="uint" />
<field name="Floating Point Mode" dword="1" bits="16:16" type="uint" prefix="FLOATING_POINT_MODE">
<value name="IEEE-754" value="0" />
<value name="Alternate" value="1" />
</field>
<field name="Thread Priority" dword="1" bits="17:17" type="uint">
<value name="High" value="1" />
</field>
<field name="Binding Table Entry Count" dword="1" bits="25:18" type="uint" />
<field name="Single Program Flow" dword="1" bits="31:31" type="bool" />
<field name="Per-Thread Scratch Space" dword="2" bits="3:0" type="uint" />
<field name="Scratch Space Base Pointer" dword="2" bits="31:10" type="address" />
<field name="Dispatch GRF Start Register For Constant/Setup Data 0" dword="3" bits="3:0" type="uint" />
<field name="Setup URB Entry Read Offset" dword="3" bits="9:4" type="uint" />
<field name="Setup URB Entry Read Length" dword="3" bits="16:11" type="uint" />
<field name="Constant URB Entry Read Offset" dword="3" bits="23:18" type="uint" />
<field name="Constant URB Entry Read Length" dword="3" bits="30:25" type="uint" />
<field name="Statistics Enable" dword="4" bits="0:0" type="bool" />
<field name="Sampler Count" dword="4" bits="4:2" type="uint" />
<field name="Sampler State Pointer" dword="4" bits="31:5" type="address" />
<field name="8 Pixel Dispatch Enable" dword="5" bits="0:0" type="bool" />
<field name="16 Pixel Dispatch Enable" dword="5" bits="1:1" type="bool" />
<field name="32 Pixel Dispatch Enable" dword="5" bits="2:2" type="bool" />
<field name="Contiguous 32 Pixel Dispatch Enable" dword="5" bits="3:3" type="bool" />
<field name="Contiguous 64 Pixel Dispatch Enable" dword="5" bits="4:4" type="bool" />
<field name="Fast Span Coverage Enable" dword="5" bits="6:6" type="bool" />
<field name="Depth Buffer Clear" dword="5" bits="7:7" type="bool" />
<field name="Depth Buffer Resolve Enable" dword="5" bits="8:8" type="bool" />
<field name="Hierarchical Depth Buffer Resolve Enable" dword="5" bits="9:9" type="bool" />
<field name="Legacy Global Depth Bias Enable" dword="5" bits="10:10" type="bool" />
<field name="Line Stipple Enable" dword="5" bits="11:11" type="bool" />
<field name="Global Depth Offset Enable" dword="5" bits="12:12" type="bool" />
<field name="Polygon Stipple Enable" dword="5" bits="13:13" type="bool" />
<field name="Line Antialiasing Region Width" dword="5" bits="15:14" type="uint">
<value name="0.5 pixels" value="0" />
<value name="1.0 pixels" value="1" />
<value name="2.0 pixels" value="2" />
<value name="4.0 pixels" value="3" />
</field>
<field name="Line End Cap Antialiasing Region Width" dword="5" bits="17:16" type="uint">
<value name="0.5 pixels" value="0" />
<value name="1.0 pixels" value="1" />
<value name="2.0 pixels" value="2" />
<value name="4.0 pixels" value="3" />
</field>
<field name="Early Depth Test Enable" dword="5" bits="18:18" type="bool" />
<field name="Thread Dispatch Enable" dword="5" bits="19:19" type="bool" />
<field name="Pixel Shader Uses Source Depth" dword="5" bits="20:20" type="bool" />
<field name="Pixel Shader Computed Depth" dword="5" bits="21:21" type="bool" />
<field name="Pixel Shader Kills Pixel" dword="5" bits="22:22" type="bool" />
<field name="Legacy Diamond Line Rasterization" dword="5" bits="23:23" type="bool" />
<field name="Maximum Number of Threads" dword="5" bits="31:25" type="uint" />
<field name="Global Depth Offset Constant" dword="6" bits="31:0" type="float" />
<field name="Global Depth Offset Scale" dword="7" bits="31:0" type="float" />
<field name="GRF Register Count 1" dword="8" bits="3:1" type="uint" />
<field name="Kernel Start Pointer 1" dword="8" bits="31:6" type="offset" />
<field name="GRF Register Count 2" dword="9" bits="3:1" type="uint" />
<field name="Kernel Start Pointer 2" dword="9" bits="31:6" type="offset" />
<field name="GRF Register Count 3" dword="10" bits="3:1" type="uint" />
<field name="Kernel Start Pointer 3" dword="10" bits="31:6" type="offset" />
</struct>
<instruction name="3DSTATE_CLEAR_PARAMS" bias="2" length="2" engine="render">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="0" />
<field name="Depth Clear Value Valid" dword="0" bits="15:15" type="bool" />
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="16" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="1" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="3" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
<field name="Depth Clear Value" dword="1" bits="31:0" type="uint" />
</instruction>
<instruction name="3DSTATE_DEPTH_BUFFER" bias="2" length="6" engine="render">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="4" />
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="5" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="1" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="3" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
<field name="Surface Pitch" dword="1" bits="16:0" type="uint" />
<field name="Surface Format" dword="1" bits="20:18" type="uint">
<value name="D32_FLOAT_S8X24_UINT" value="0" />
<value name="D32_FLOAT" value="1" />
<value name="D24_UNORM_S8_UINT" value="2" />
<value name="D24_UNORM_X8_UINT" value="3" />
<value name="D16_UNORM" value="5" />
</field>
<field name="Separate Stencil Buffer Enable" dword="1" bits="21:21" type="bool" />
<field name="Hierarchical Depth Buffer Enable" dword="1" bits="22:22" type="bool" />
<field name="Software Tiled Rendering Mode" dword="1" bits="24:23" type="uint">
<value name="NORMAL" value="0" />
<value name="STR1" value="1" />
<value name="STR2" value="3" />
</field>
<field name="Tile Walk" dword="1" bits="26:26" type="uint">
<value name="TILEWALK_YMAJOR" value="1" />
</field>
<field name="Tiled Surface" dword="1" bits="27:27" type="bool" />
<field name="Surface Type" dword="1" bits="31:29" type="uint">
<value name="SURFTYPE_1D" value="0" />
<value name="SURFTYPE_2D" value="1" />
<value name="SURFTYPE_3D" value="2" />
<value name="SURFTYPE_CUBE" value="3" />
<value name="SURFTYPE_NULL" value="7" />
</field>
<field name="Surface Base Address" dword="2" bits="31:0" type="address" />
<field name="MIP Map Layout Mode" dword="3" bits="1:1" type="uint">
<value name="MIPLAYOUT_BELOW" value="0" />
<value name="MIPLAYOUT_RIGHT" value="1" />
</field>
<field name="LOD" dword="3" bits="5:2" type="uint" />
<field name="Width" dword="3" bits="18:6" type="uint" />
<field name="Height" dword="3" bits="31:19" type="uint" />
<field name="Render Target View Extent" dword="4" bits="9:1" type="uint" />
<field name="Minimum Array Element" dword="4" bits="20:10" type="uint" />
<field name="Depth" dword="4" bits="31:21" type="uint" />
<field name="Depth Coordinate Offset X" dword="5" bits="15:0" type="int" />
<field name="Depth Coordinate Offset Y" dword="5" bits="31:16" type="int" />
</instruction>
<instruction name="3DSTATE_HIER_DEPTH_BUFFER" bias="2" length="3" engine="render">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="1" />
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="15" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="1" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="3" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
<field name="Surface Pitch" dword="1" bits="16:0" type="uint" />
<field name="Surface Base Address" dword="2" bits="31:0" type="address" />
</instruction>
<instruction name="3DSTATE_LINE_STIPPLE" bias="2" length="3" engine="render">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="1" />
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="8" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="1" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="3" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
<field name="Line Stipple Pattern" dword="1" bits="15:0" type="uint" />
<field name="Current Stipple Index" dword="1" bits="19:16" type="uint" />
<field name="Current Repeat Counter" dword="1" bits="29:21" type="uint" />
<field name="Modify Enable" dword="1" bits="31:31" type="bool" />
<field name="Line Stipple Repeat Count" dword="2" bits="8:0" type="uint" />
<field name="Line Stipple Inverse Repeat Count" dword="2" bits="31:16" type="u1.13" />
</instruction>
<instruction name="3DSTATE_STENCIL_BUFFER" bias="2" length="3" engine="render">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="1" />
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="14" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="1" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="3" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
<field name="Surface Pitch" dword="1" bits="16:0" type="uint" />
<field name="Surface Base Address" dword="2" bits="31:0" type="address" />
</instruction>
<instruction name="CONSTANT_BUFFER" bias="2" length="2" engine="render">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="0" />
<field name="Valid" dword="0" bits="8:8" type="bool" />
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="2" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="0" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="0" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
<field name="Buffer Length" dword="1" bits="5:0" type="uint" />
<field name="Buffer Starting Address" dword="1" bits="31:6" type="address" />
</instruction>
<instruction name="MI_FLUSH" bias="1" length="1" engine="render">
<field name="State/Instruction Cache Invalidate" dword="0" bits="1:1" type="uint">
<value name="Don't Invalidate" value="0" />
<value name="Invalidate" value="1" />
</field>
<field name="Render Cache Flush Inhibit" dword="0" bits="2:2" type="uint">
<value name="Flush" value="0" />
<value name="Don't Flush" value="1" />
</field>
<field name="Global Snapshot Count Reset" dword="0" bits="3:3" type="uint">
<value name="Don't Reset" value="0" />
<value name="Reset" value="1" />
</field>
<field name="Generic Media State Clear" dword="0" bits="4:4" type="bool" />
<field name="Indirect State Pointers Disable" dword="0" bits="5:5" type="bool" />
<field name="Protected Memory Enable" dword="0" bits="6:6" type="bool" />
<field name="MI Command Opcode" dword="0" bits="28:23" type="uint" default="4" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="0" />
</instruction>
<instruction name="MI_STORE_DATA_IMM" bias="2" length="5">
<field name="DWord Length" dword="0" bits="5:0" type="uint" default="2" />
<field name="Memory Address Type" dword="0" bits="22:22" type="bool" />
<field name="MI Command Opcode" dword="0" bits="28:23" type="uint" default="32" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="0" />
<field name="Physical Start Address Extension" dword="1" bits="3:0" type="address" />
<field name="Address" dword="2" bits="31:2" type="address" />
<field name="Immediate Data" dword="3" bits="63:0" type="uint" />
</instruction>
<instruction name="MI_STORE_REGISTER_MEM" bias="2" length="3">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="1" />
<field name="Use Global GTT" dword="0" bits="22:22" type="bool" />
<field name="MI Command Opcode" dword="0" bits="28:23" type="uint" default="36" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="0" />
<field name="Register Address" dword="1" bits="25:2" type="offset" />
<field name="Memory Address" dword="2" bits="31:2" type="address" />
</instruction>
<instruction name="PIPELINE_SELECT" bias="1" length="1" engine="render">
<field name="Pipeline Selection" dword="0" bits="1:0" type="uint">
<value name="3D" value="0" />
<value name="Media" value="1" />
<value name="GPGPU" value="2" />
</field>
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="4" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="1" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="1" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
</instruction>
<instruction name="PIPE_CONTROL" bias="2" length="4" engine="render">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="2" />
<field name="Notify Enable" dword="0" bits="8:8" type="bool" />
<field name="Indirect State Pointers Disable" dword="0" bits="9:9" type="bool" />
<field name="Texture Cache Flush Enable" dword="0" bits="10:10" type="bool" />
<field name="Instruction Cache Invalidate Enable" dword="0" bits="11:11" type="bool" />
<field name="Write Cache Flush" dword="0" bits="12:12" type="bool" />
<field name="Depth Stall Enable" dword="0" bits="13:13" type="bool" />
<field name="Post Sync Operation" dword="0" bits="15:14" type="uint">
<value name="No Write" value="0" />
<value name="Write Immediate Data" value="1" />
<value name="Write PS Depth Count" value="2" />
<value name="Write Timestamp" value="3" />
</field>
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="0" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="2" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="3" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
<field name="Depth Cache Flush Inhibit" dword="1" bits="0:0" type="uint">
<value name="Flushed" value="0" />
<value name="Not Flushed" value="1" />
</field>
<field name="Stall At Pixel Scoreboard" dword="1" bits="1:1" type="bool" />
<field name="Destination Address Type" dword="1" bits="2:2" type="uint" prefix="DAT">
<value name="PGTT" value="0" />
<value name="GGTT" value="1" />
</field>
<field name="Address" dword="1" bits="31:3" type="address" />
<field name="Immediate Data" dword="2" bits="63:0" type="uint" />
</instruction>
<instruction name="STATE_BASE_ADDRESS" bias="2" length="8" engine="render">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="6" />
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="1" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="1" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="0" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
<field name="General State Base Address Modify Enable" dword="1" bits="0:0" type="bool" />
<field name="General State Base Address" dword="1" bits="31:12" type="address" />
<field name="Surface State Base Address Modify Enable" dword="2" bits="0:0" type="bool" />
<field name="Surface State Base Address" dword="2" bits="31:12" type="address" />
<field name="Indirect Object Base Address Modify Enable" dword="3" bits="0:0" type="bool" />
<field name="Indirect Object Base Address" dword="3" bits="31:12" type="address" />
<field name="Instruction Base Address Modify Enable" dword="4" bits="0:0" type="bool" />
<field name="Instruction Base Address" dword="4" bits="31:12" type="address" />
<field name="General State Access Upper Bound Modify Enable" dword="5" bits="0:0" type="bool" />
<field name="General State Access Upper Bound" dword="5" bits="31:12" type="address" />
<field name="Indirect Object Access Upper Bound Modify Enable" dword="6" bits="0:0" type="bool" />
<field name="Indirect Object Access Upper Bound" dword="6" bits="31:12" type="address" />
<field name="Instruction Access Upper Bound Modify Enable" dword="7" bits="0:0" type="bool" />
<field name="Instruction Access Upper Bound" dword="7" bits="31:12" type="address" />
</instruction>
<instruction name="XY_COLOR_BLT" bias="2" length="6" engine="render">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="4" />
<field name="Tiling Enable" dword="0" bits="11:11" type="bool" />
<field name="32bpp Byte Mask" dword="0" bits="21:20" type="uint" />
<field name="2D Command Opcode" dword="0" bits="28:22" type="uint" default="80" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="2" />
<field name="Destination Pitch" dword="1" bits="15:0" type="int" />
<field name="Raster Operation" dword="1" bits="23:16" type="uint" />
<field name="Color Depth" dword="1" bits="26:24" type="uint" prefix="COLOR_DEPTH">
<value name="8 bit" value="0" />
<value name="565" value="1" />
<value name="1555" value="2" />
<value name="32 bit" value="3" />
</field>
<field name="Clipping Enabled" dword="1" bits="30:30" type="bool" />
<field name="Destination X1 Coordinate" dword="2" bits="15:0" type="int" />
<field name="Destination Y1 Coordinate" dword="2" bits="31:16" type="int" />
<field name="Destination X2 Coordinate" dword="3" bits="15:0" type="int" />
<field name="Destination Y2 Coordinate" dword="3" bits="31:16" type="int" />
<field name="Destination Base Address" dword="4" bits="31:0" type="address" />
<field name="Solid Pattern Color" dword="5" bits="31:0" type="int" />
</instruction>
<instruction name="XY_SETUP_BLT" bias="2" length="8" engine="blitter">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="6" />
<field name="Tiling Enable" dword="0" bits="11:11" type="bool" />
<field name="32bpp Byte Mask" dword="0" bits="21:20" type="uint" />
<field name="2D Command Opcode" dword="0" bits="28:22" type="uint" default="1" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="2" />
<field name="Destination Pitch" dword="1" bits="15:0" type="int" />
<field name="Raster Operation" dword="1" bits="23:16" type="uint" />
<field name="Color Depth" dword="1" bits="25:24" type="uint" prefix="COLOR_DEPTH">
<value name="8 bit" value="0" />
<value name="565" value="1" />
<value name="1555" value="2" />
<value name="32 bit" value="3" />
</field>
<field name="Mono Source Transparency Mode" dword="1" bits="28:28" type="bool" />
<field name="Clipping Enabled" dword="1" bits="30:30" type="bool" />
<field name="ClipRect X1 Coordinate" dword="2" bits="15:0" type="int" />
<field name="ClipRect Y1 Coordinate" dword="2" bits="31:16" type="int" />
<field name="ClipRect X2 Coordinate" dword="3" bits="15:0" type="int" />
<field name="ClipRect Y2 Coordinate" dword="3" bits="31:16" type="int" />
<field name="Destination Base Address" dword="4" bits="31:0" type="address" />
<field name="Background Color" dword="5" bits="31:0" type="uint" />
<field name="Foreground Color" dword="6" bits="31:0" type="uint" />
<field name="Pattern Base Address" dword="7" bits="31:0" type="uint" />
</instruction>
<instruction name="XY_SRC_COPY_BLT" bias="2" length="8" engine="render">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="6" />
<field name="Destination Tiling Enable" dword="0" bits="11:11" type="bool" />
<field name="Source Tiling Enable" dword="0" bits="15:15" type="bool" />
<field name="32bpp Byte Mask" dword="0" bits="21:20" type="uint" />
<field name="2D Command Opcode" dword="0" bits="28:22" type="uint" default="83" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="2" />
<field name="Destination Pitch" dword="1" bits="15:0" type="int" />
<field name="Raster Operation" dword="1" bits="23:16" type="uint" />
<field name="Color Depth" dword="1" bits="26:24" type="uint" prefix="COLOR_DEPTH">
<value name="8 bit" value="0" />
<value name="565" value="1" />
<value name="1555" value="2" />
<value name="32 bit" value="3" />
</field>
<field name="Clipping Enabled" dword="1" bits="30:30" type="bool" />
<field name="Destination X1 Coordinate" dword="2" bits="15:0" type="int" />
<field name="Destination Y1 Coordinate" dword="2" bits="31:16" type="int" />
<field name="Destination X2 Coordinate" dword="3" bits="15:0" type="int" />
<field name="Destination Y2 Coordinate" dword="3" bits="31:16" type="int" />
<field name="Destination Base Address" dword="4" bits="31:0" type="address" />
<field name="Source X1 Coordinate" dword="5" bits="15:0" type="int" />
<field name="Source Y1 Coordinate" dword="5" bits="31:16" type="int" />
<field name="Source Pitch" dword="6" bits="15:0" type="int" />
<field name="Source Base Address" dword="7" bits="31:0" type="address" />
</instruction>
</genxml>
src/intel/genxml/gen60.xml
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src/intel/genxml/gen70.xml
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src/intel/genxml/gen75.xml
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src/intel/genxml/gen80.xml
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src/intel/genxml/gen90.xml
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src/intel/genxml/genX_cl_helpers.h
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/* Copyright © 2023 Intel Corporation
* SPDX-License-Identifier: MIT
*/
#ifndef __GENX_CL_HELPERS_H__
#define __GENX_CL_HELPERS_H__
#include "compiler/libcl/libcl.h"
#define UNUSED
ALWAYS_INLINE static uint64_t
util_bitpack_uint(uint64_t v, uint32_t start, UNUSED uint32_t end)
{
return v << start;
}
ALWAYS_INLINE static uint64_t
util_bitpack_uint_nonzero(uint64_t v, uint32_t start, uint32_t end)
{
return util_bitpack_uint(v, start, end);
}
ALWAYS_INLINE static uint64_t
util_bitpack_sint(int64_t v, uint32_t start, uint32_t end)
{
int32_t bits = end - start + 1;
uint64_t mask = BITFIELD64_MASK(bits);
return (v & mask) << start;
}
ALWAYS_INLINE static uint64_t
util_bitpack_sint_nonzero(int64_t v, uint32_t start, uint32_t end)
{
return util_bitpack_sint(v, start, end);
}
ALWAYS_INLINE static uint32_t
util_bitpack_float(float v)
{
union { float f; uint32_t dw; } x;
x.f = v;
return x.dw;
}
ALWAYS_INLINE static uint32_t
util_bitpack_float_nonzero(float v)
{
return util_bitpack_float(v);
}
ALWAYS_INLINE static uint64_t
util_bitpack_sfixed(float v, uint32_t start, uint32_t end,
uint32_t fract_bits)
{
float factor = (1 << fract_bits);
int64_t int_val = round(v * factor);
uint64_t mask = ~0ul >> (64 - (end - start + 1));
return (int_val & mask) << start;
}
ALWAYS_INLINE static uint64_t
util_bitpack_sfixed_clamp(float v, uint32_t start, uint32_t end,
uint32_t fract_bits)
{
float factor = (1 << fract_bits);
uint32_t total_bits = end - start + 1;
float min = u_intN_min(total_bits) / factor;
float max = u_intN_max(total_bits) / factor;
int64_t int_val = round(CLAMP(v, min, max) * factor);
uint64_t mask = ~0ul >> (64 - (end - start + 1));
return (int_val & mask) << start;
}
ALWAYS_INLINE static uint64_t
util_bitpack_sfixed_nonzero(float v, uint32_t start, uint32_t end,
uint32_t fract_bits)
{
return util_bitpack_sfixed(v, start, end, fract_bits);
}
ALWAYS_INLINE static uint64_t
util_bitpack_ufixed(float v, uint32_t start, uint32_t end, uint32_t fract_bits)
{
float factor = (1 << fract_bits);
uint64_t uint_val = round(v * factor);
return uint_val << start;
}
ALWAYS_INLINE static uint64_t
util_bitpack_ufixed_clamp(float v, uint32_t start, uint32_t end, uint32_t fract_bits)
{
float factor = (1 << fract_bits);
int total_bits = end - start + 1;
float min = 0.0f;
float max = u_uintN_max(total_bits) / factor;
uint64_t uint_val = round(CLAMP(v, min, max) * factor);
return uint_val << start;
}
ALWAYS_INLINE static uint64_t
util_bitpack_ufixed_nonzero(float v, uint32_t start, uint32_t end,
uint32_t fract_bits)
{
return util_bitpack_ufixed(v, start, end, fract_bits);
}
#ifndef __gen_validate_value
#define __gen_validate_value(x)
#endif
#ifndef __intel_field_functions
#define __intel_field_functions
#endif
static inline __attribute__((always_inline)) uint64_t
__gen_offset(uint64_t v, UNUSED uint32_t start, UNUSED uint32_t end)
{
return v;
}
static inline __attribute__((always_inline)) uint64_t
__gen_offset_nonzero(uint64_t v, uint32_t start, uint32_t end)
{
return __gen_offset(v, start, end);
}
static inline __attribute__((always_inline)) uint64_t
__gen_address(uint64_t address,
__attribute__((unused)) uint32_t start, uint32_t end)
{
if (end < 63) {
uint32_t shift = 63 - end;
return (address << shift) >> shift;
} else {
return address;
}
}
#endif /* __GENX_CL_HELPERS_H__ */
src/intel/genxml/genX_cl_pack.h
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/* Copyright © 2023 Intel Corporation
* SPDX-License-Identifier: MIT
*/
#ifndef GENX_CL_PACK_H
#define GENX_CL_PACK_H
#ifndef GFX_VERx10
# error "The GFX_VERx10 macro must be defined"
#endif
#if (GFX_VERx10 == 40)
# include "genxml/gen40_cl_pack.h"
#elif (GFX_VERx10 == 45)
# include "genxml/gen45_cl_pack.h"
#elif (GFX_VERx10 == 50)
# include "genxml/gen50_cl_pack.h"
#elif (GFX_VERx10 == 60)
# include "genxml/gen60_cl_pack.h"
#elif (GFX_VERx10 == 70)
# include "genxml/gen70_cl_pack.h"
#elif (GFX_VERx10 == 75)
# include "genxml/gen75_cl_pack.h"
#elif (GFX_VERx10 == 80)
# include "genxml/gen80_cl_pack.h"
#elif (GFX_VERx10 == 90)
# include "genxml/gen90_cl_pack.h"
#elif (GFX_VERx10 == 110)
# include "genxml/gen110_cl_pack.h"
#elif (GFX_VERx10 == 120)
# include "genxml/gen120_cl_pack.h"
#elif (GFX_VERx10 == 125)
# include "genxml/gen125_cl_pack.h"
#elif (GFX_VERx10 == 200)
# include "genxml/xe2_cl_pack.h"
#elif (GFX_VERx10 == 300)
# include "genxml/xe3_cl_pack.h"
#elif (GFX_VERx10 == 350)
# include "genxml/xe3p_cl_pack.h"
#else
# error "Need to add a pack header include for this gen"
#endif
#endif /* GENX_CL_PACK_H */
src/intel/genxml/genX_helpers.h
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/* Copyright © 2023 Intel Corporation
* SPDX-License-Identifier: MIT
*/
#ifndef __GENX_HELPERS_H__
#define __GENX_HELPERS_H__
#ifndef __gen_validate_value
#define __gen_validate_value(x)
#endif
#ifndef __intel_field_functions
#define __intel_field_functions
#endif
#ifndef __gen_address_type
#error #define __gen_address_type before including this file
#endif
#ifndef __gen_user_data
#error #define __gen_combine_address before including this file
#endif
static inline __attribute__((always_inline)) uint64_t
__gen_offset(uint64_t v, ASSERTED uint32_t start, ASSERTED uint32_t end)
{
__gen_validate_value(v);
#ifndef NDEBUG
uint64_t mask = (~0ull >> (64 - (end - start + 1))) << start;
assert((v & ~mask) == 0);
#endif
return v;
}
static inline __attribute__((always_inline)) uint64_t
__gen_offset_nonzero(uint64_t v, uint32_t start, uint32_t end)
{
assert(v != 0ull);
return __gen_offset(v, start, end);
}
static inline __attribute__((always_inline)) uint64_t
__gen_address(__gen_user_data *data, void *location,
__gen_address_type address, uint32_t delta,
__attribute__((unused)) uint32_t start, uint32_t end)
{
uint64_t addr_u64 = __gen_combine_address(data, location, address, delta);
if (end == 31) {
return addr_u64;
} else if (end < 63) {
const unsigned shift = 63 - end;
return (addr_u64 << shift) >> shift;
} else {
return addr_u64;
}
}
#endif /* __GENX_HELPERS_H__ */
src/intel/genxml/genX_pack.h
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/*
* Copyright © 2015 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
#ifndef GENX_PACK_H
#define GENX_PACK_H
#ifndef GFX_VERx10
# error "The GFX_VERx10 macro must be defined"
#endif
#if (GFX_VERx10 == 40)
# include "genxml/gen40_pack.h"
#elif (GFX_VERx10 == 45)
# include "genxml/gen45_pack.h"
#elif (GFX_VERx10 == 50)
# include "genxml/gen50_pack.h"
#elif (GFX_VERx10 == 60)
# include "genxml/gen60_pack.h"
#elif (GFX_VERx10 == 70)
# include "genxml/gen70_pack.h"
#elif (GFX_VERx10 == 75)
# include "genxml/gen75_pack.h"
#elif (GFX_VERx10 == 80)
# include "genxml/gen80_pack.h"
#elif (GFX_VERx10 == 90)
# include "genxml/gen90_pack.h"
#elif (GFX_VERx10 == 110)
# include "genxml/gen110_pack.h"
#elif (GFX_VERx10 == 120)
# include "genxml/gen120_pack.h"
#elif (GFX_VERx10 == 125)
# include "genxml/gen125_pack.h"
#elif (GFX_VERx10 == 200)
# include "genxml/xe2_pack.h"
#elif (GFX_VERx10 == 300)
# include "genxml/xe3_pack.h"
#elif (GFX_VERx10 == 350)
# include "genxml/xe3p_pack.h"
#else
# error "Need to add a pack header include for this gen"
#endif
#endif /* GENX_PACK_H */
src/intel/genxml/genX_rt_cl_pack.h
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/* Copyright © 2024 Intel Corporation
* SPDX-License-Identifier: MIT
*/
#ifndef GENX_RT_CL_PACK_H
#define GENX_RT_CL_PACK_H
#ifndef GFX_VERx10
# error "The GFX_VERx10 macro must be defined"
#endif
#if (GFX_VERx10 < 125)
/* No RT support for those gfx ver */
#elif (GFX_VERx10 == 125)
# include "genxml/gen125_rt_cl_pack.h"
#elif (GFX_VERx10 == 200)
# include "genxml/xe2_rt_cl_pack.h"
#elif (GFX_VERx10 == 300)
# include "genxml/xe3_rt_cl_pack.h"
#elif (GFX_VERx10 == 350)
# include "genxml/xe3p_rt_cl_pack.h"
#else
# error "Need to add a pack header include for this gen"
#endif
#endif /* GENX_RT_CL_PACK_H */
src/intel/genxml/genX_rt_pack.h
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/*
* Copyright © 2022 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
#ifndef GENX_RT_PACK_H
#define GENX_RT_PACK_H
#ifndef GFX_VERx10
# error "The GFX_VERx10 macro must be defined"
#endif
#if (GFX_VERx10 < 125)
/* No RT support for those gfx ver */
#elif (GFX_VERx10 == 125)
# include "genxml/gen125_rt_pack.h"
#elif (GFX_VERx10 == 200)
# include "genxml/xe2_rt_pack.h"
#elif (GFX_VERx10 == 300)
# include "genxml/xe3_rt_pack.h"
#elif (GFX_VERx10 == 350)
# include "genxml/xe3p_rt_pack.h"
#else
# error "Need to add a pack header include for this gen"
#endif
#endif /* GENX_RT_PACK_H */
src/intel/genxml/genX_video_pack.h
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/*
* Copyright © 2015 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
#ifndef GENX_VIDEO_PACK_H
#define GENX_VIDEO_PACK_H
#ifndef GFX_VERx10
# error "The GFX_VERx10 macro must be defined"
#endif
#if (GFX_VERx10 == 40)
# include "genxml/gen40_video_pack.h"
#elif (GFX_VERx10 == 45)
# include "genxml/gen45_video_pack.h"
#elif (GFX_VERx10 == 50)
# include "genxml/gen50_video_pack.h"
#elif (GFX_VERx10 == 60)
# include "genxml/gen60_video_pack.h"
#elif (GFX_VERx10 == 70)
# include "genxml/gen70_video_pack.h"
#elif (GFX_VERx10 == 75)
# include "genxml/gen75_video_pack.h"
#elif (GFX_VERx10 == 80)
# include "genxml/gen80_video_pack.h"
#elif (GFX_VERx10 == 90)
# include "genxml/gen90_video_pack.h"
#elif (GFX_VERx10 == 110)
# include "genxml/gen110_video_pack.h"
#elif (GFX_VERx10 == 120)
# include "genxml/gen120_video_pack.h"
#elif (GFX_VERx10 == 125)
# include "genxml/gen125_video_pack.h"
#elif (GFX_VERx10 == 200)
# include "genxml/xe2_video_pack.h"
#elif (GFX_VERx10 == 300)
# include "genxml/xe3_video_pack.h"
#elif (GFX_VERx10 == 350)
# include "genxml/xe3p_video_pack.h"
#else
# error "Need to add a pack header include for this gen"
#endif
#endif /* GENX_VIDEO_PACK_H */
src/intel/genxml/gen_bits_header.py
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#encoding=utf-8
# Copyright © 2017 Intel Corporation
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"), to deal
# in the Software without restriction, including without limitation the rights
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
# copies of the Software, and to permit persons to whom the Software is
# furnished to do so, subject to the following conditions:
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
# SOFTWARE.
import argparse
import intel_genxml
import os
from mako.template import Template
from util import *
TEMPLATE = Template("""\
<%!
from operator import itemgetter
%>\
/*
* Copyright © 2017 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
/* THIS FILE HAS BEEN GENERATED, DO NOT HAND EDIT.
*
* Sizes of bitfields in genxml instructions, structures, and registers.
*/
#ifndef ${guard}
#define ${guard}
#include <stdint.h>
#include "dev/intel_device_info.h"
#include "util/macros.h"
<%def name="emit_per_gen_prop_func(item, prop, protect_defines)">
%if item.has_prop(prop):
% for gen, value in sorted(item.iter_prop(prop), reverse=True):
% if protect_defines:
#ifndef ${gen.prefix(item.token_name)}_${prop}
#define ${gen.prefix(item.token_name)}_${prop} ${value}
#endif
% else:
#define ${gen.prefix(item.token_name)}_${prop} ${value}
% endif
% endfor
static inline uint32_t ATTRIBUTE_PURE
${item.token_name}_${prop}(const struct intel_device_info *devinfo)
{
switch (devinfo->verx10) {
case 350: return ${item.get_prop(prop, 35)};
case 300: return ${item.get_prop(prop, 30)};
case 200: return ${item.get_prop(prop, 20)};
case 125: return ${item.get_prop(prop, 12.5)};
case 120: return ${item.get_prop(prop, 12)};
case 110: return ${item.get_prop(prop, 11)};
case 90: return ${item.get_prop(prop, 9)};
case 80: return ${item.get_prop(prop, 8)};
case 75: return ${item.get_prop(prop, 7.5)};
case 70: return ${item.get_prop(prop, 7)};
case 60: return ${item.get_prop(prop, 6)};
case 50: return ${item.get_prop(prop, 5)};
case 45: return ${item.get_prop(prop, 4.5)};
case 40: return ${item.get_prop(prop, 4)};
default:
UNREACHABLE("Invalid hardware generation");
}
}
%endif
</%def>
#ifdef __cplusplus
extern "C" {
#endif
% for _, container in sorted(containers.items(), key=itemgetter(0)):
% if container.allowed:
/* ${container.name} */
${emit_per_gen_prop_func(container, 'length', True)}
% for _, field in sorted(container.fields.items(), key=itemgetter(0)):
% if field.allowed:
/* ${container.name}::${field.name} */
${emit_per_gen_prop_func(field, 'bits', False)}
${emit_per_gen_prop_func(field, 'start', False)}
% endif
% endfor
% endif
% endfor
#ifdef __cplusplus
}
#endif
#endif /* ${guard} */
""")
class Gen(object):
def __init__(self, z):
# Convert potential "major.minor" string
self.tenx = int(float(z) * 10)
def __lt__(self, other):
return self.tenx < other.tenx
def __hash__(self):
return hash(self.tenx)
def __eq__(self, other):
return self.tenx == other.tenx
def prefix(self, token):
gen = self.tenx
if gen % 10 == 0:
gen //= 10
if token[0] == '_':
token = token[1:]
return 'GFX{}_{}'.format(gen, token)
class Container(object):
def __init__(self, name):
self.name = name
self.token_name = safe_name(name)
self.length_by_gen = {}
self.fields = {}
self.allowed = False
def add_gen(self, gen, xml_attrs):
assert isinstance(gen, Gen)
if 'length' in xml_attrs:
self.length_by_gen[gen] = xml_attrs['length']
def get_field(self, field_name, create=False):
key = to_alphanum(field_name)
if key not in self.fields:
if create:
self.fields[key] = Field(self, field_name)
else:
return None
return self.fields[key]
def has_prop(self, prop):
if prop == 'length':
return bool(self.length_by_gen)
else:
raise ValueError('Invalid property: "{0}"'.format(prop))
def iter_prop(self, prop):
if prop == 'length':
return self.length_by_gen.items()
else:
raise ValueError('Invalid property: "{0}"'.format(prop))
def get_prop(self, prop, gen):
if not isinstance(gen, Gen):
gen = Gen(gen)
if prop == 'length':
return self.length_by_gen.get(gen, 0)
else:
raise ValueError('Invalid property: "{0}"'.format(prop))
class Field(object):
def __init__(self, container, name):
self.name = name
self.token_name = safe_name('_'.join([container.name, self.name]))
self.bits_by_gen = {}
self.start_by_gen = {}
self.allowed = False
def add_gen(self, gen, xml_attrs):
assert isinstance(gen, Gen)
dword = int(xml_attrs['dword'])
end, start = map(int, xml_attrs['bits'].split(':'))
self.start_by_gen[gen] = dword * 32 + start
self.bits_by_gen[gen] = 1 + end - start
def has_prop(self, prop):
return True
def iter_prop(self, prop):
if prop == 'bits':
return self.bits_by_gen.items()
elif prop == 'start':
return self.start_by_gen.items()
else:
raise ValueError('Invalid property: "{0}"'.format(prop))
def get_prop(self, prop, gen):
if not isinstance(gen, Gen):
gen = Gen(gen)
if prop == 'bits':
return self.bits_by_gen.get(gen, 0)
elif prop == 'start':
return self.start_by_gen.get(gen, 0)
else:
raise ValueError('Invalid property: "{0}"'.format(prop))
class XmlParser(object):
def __init__(self, containers):
self.gen = None
self.containers = containers
self.container_stack = []
self.container_stack.append(None)
def emit_genxml(self, genxml):
root = genxml.et.getroot()
self.gen = Gen(root.attrib['gen'])
for item in root:
self.process_item(item)
def process_item(self, item):
name = item.tag
attrs = item.attrib
if name in ('instruction', 'struct', 'register'):
self.start_container(attrs)
for struct_item in item:
self.process_item(struct_item)
self.container_stack.pop()
elif name == 'group':
self.container_stack.append(None)
for group_item in item:
self.process_item(group_item)
self.container_stack.pop()
elif name == 'field':
self.process_field(attrs)
elif name in ('enum', 'import'):
pass
else:
assert False
def start_container(self, attrs):
assert self.container_stack[-1] is None
name = attrs['name']
if name not in self.containers:
self.containers[name] = Container(name)
self.container_stack.append(self.containers[name])
self.container_stack[-1].add_gen(self.gen, attrs)
def process_field(self, attrs):
if self.container_stack[-1] is None:
return
field_name = attrs.get('name', None)
if not field_name:
return
self.container_stack[-1].get_field(field_name, True).add_gen(self.gen, attrs)
def parse_args():
p = argparse.ArgumentParser()
p.add_argument('-o', '--output', type=str,
help="If OUTPUT is unset or '-', then it defaults to '/dev/stdout'")
p.add_argument('--cpp-guard', type=str,
help='If unset, then CPP_GUARD is derived from OUTPUT.')
p.add_argument('--engines', nargs='?', type=str, default='render',
help="Comma-separated list of engines whose instructions should be parsed (default: %(default)s)")
p.add_argument('--include-symbols', type=str, action='store',
help='List of instruction/structures to generate',
required=True)
p.add_argument('xml_sources', metavar='XML_SOURCE', nargs='+')
pargs = p.parse_args()
if pargs.output in (None, '-'):
pargs.output = '/dev/stdout'
if pargs.cpp_guard is None:
pargs.cpp_guard = os.path.basename(pargs.output).upper().replace('.', '_')
return pargs
def main():
pargs = parse_args()
engines = set(pargs.engines.split(','))
valid_engines = [ 'render', 'blitter', 'video' ]
if engines - set(valid_engines):
print("Invalid engine specified, valid engines are:\n")
for e in valid_engines:
print("\t%s" % e)
sys.exit(1)
# Maps name => Container
containers = {}
for source in pargs.xml_sources:
p = XmlParser(containers)
genxml = intel_genxml.GenXml(source)
genxml.filter_engines(engines)
genxml.merge_imported()
p.emit_genxml(genxml)
included_symbols_list = pargs.include_symbols.split(',')
for _name_field in included_symbols_list:
name_field = _name_field.split('::')
container = containers[name_field[0]]
container.allowed = True
if len(name_field) > 1:
field = container.get_field(name_field[1])
assert field
field.allowed = True
with open(pargs.output, 'w', encoding='utf-8') as f:
f.write(TEMPLATE.render(containers=containers, guard=pargs.cpp_guard))
if __name__ == '__main__':
main()
src/intel/genxml/gen_macros.h
+108
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/*
* Copyright © 2015 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
#ifndef GEN_MACROS_H
#define GEN_MACROS_H
/* Macros for handling per-gen compilation.
*
* The prefixing macros GENX() and genX() automatically prefix whatever you
* give them by GENX_ or genX_ where X is the gen number.
*
* You can do pseudo-runtime checks in your function such as
*
* if (GFX_VERx10 == 75) {
* // Do something
* }
*
* The contents of the if statement must be valid regardless of gen, but
* the if will get compiled away on everything except haswell.
*
* For places where you really do have a compile-time conflict, you can
* use preprocessor logic:
*
* #if (GFX_VERx10 == 75)
* // Do something
* #endif
*
* However, it is strongly recommended that the former be used whenever
* possible.
*/
/* Base macro defined on the command line. If we don't have this, we can't
* do anything.
*/
#ifndef GFX_VERx10
# error "The GFX_VERx10 macro must be defined"
#endif
#define GFX_VER ((GFX_VERx10) / 10)
/* Prefixing macros */
#if (GFX_VERx10 == 40)
# define GENX(X) GFX4_##X
# define genX(x) gfx4_##x
#elif (GFX_VERx10 == 45)
# define GENX(X) GFX45_##X
# define genX(x) gfx45_##x
#elif (GFX_VERx10 == 50)
# define GENX(X) GFX5_##X
# define genX(x) gfx5_##x
#elif (GFX_VERx10 == 60)
# define GENX(X) GFX6_##X
# define genX(x) gfx6_##x
#elif (GFX_VERx10 == 70)
# define GENX(X) GFX7_##X
# define genX(x) gfx7_##x
#elif (GFX_VERx10 == 75)
# define GENX(X) GFX75_##X
# define genX(x) gfx75_##x
#elif (GFX_VERx10 == 80)
# define GENX(X) GFX8_##X
# define genX(x) gfx8_##x
#elif (GFX_VERx10 == 90)
# define GENX(X) GFX9_##X
# define genX(x) gfx9_##x
#elif (GFX_VERx10 == 110)
# define GENX(X) GFX11_##X
# define genX(x) gfx11_##x
#elif (GFX_VERx10 == 120)
# define GENX(X) GFX12_##X
# define genX(x) gfx12_##x
#elif (GFX_VERx10 == 125)
# define GENX(X) GFX125_##X
# define genX(x) gfx125_##x
#elif (GFX_VERx10 == 200)
# define GENX(X) GFX20_##X
# define genX(x) gfx20_##x
#elif (GFX_VERx10 == 300)
# define GENX(X) GFX30_##X
# define genX(x) gfx30_##x
#elif (GFX_VERx10 == 350)
# define GENX(X) GFX35_##X
# define genX(x) gfx35_##x
#else
# error "Need to add prefixing macros for this gen"
#endif
#endif /* GEN_MACROS_H */
src/intel/genxml/gen_pack_header.py
+685
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#encoding=utf-8
import argparse
import ast
import intel_genxml
import re
import sys
import copy
import textwrap
from util import *
license = """/*
* Copyright (C) 2016 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
"""
pack_header = """%(license)s
/* Instructions, enums and structures for %(platform)s.
*
* This file has been generated, do not hand edit.
*/
#ifndef %(guard)s
#define %(guard)s
#ifndef __OPENCL_VERSION__
#include <stdio.h>
#include "util/bitpack_helpers.h"
#include "genX_helpers.h"
#else
#include "genX_cl_helpers.h"
#endif
"""
def num_from_str(num_str):
if num_str.lower().startswith('0x'):
return int(num_str, base=16)
assert not num_str.startswith('0'), 'octals numbers not allowed'
return int(num_str)
def bool_from_str(bool_str):
options = { "true": True, "false": False }
return options[bool_str];
class Field(object):
ufixed_pattern = re.compile(r"u(\d+)\.(\d+)")
sfixed_pattern = re.compile(r"s(\d+)\.(\d+)")
def __init__(self, parser, attrs):
self.parser = parser
if "name" in attrs:
self.name = safe_name(attrs["name"])
dword = int(attrs["dword"])
end_bit, start_bit = map(int, attrs["bits"].split(":"))
self.start = dword * 32 + start_bit
self.end = dword * 32 + end_bit
self.type = attrs["type"]
self.nonzero = bool_from_str(attrs.get("nonzero", "false"))
self.prefix = attrs["prefix"] if "prefix" in attrs else None
assert self.start <= self.end, \
'field {} has end ({}) < start ({})'.format(self.name, self.end,
self.start)
if self.type == 'bool':
assert self.end == self.start, \
'bool field ({}) is too wide'.format(self.name)
if "default" in attrs:
# Base 0 recognizes 0x, 0o, 0b prefixes in addition to decimal ints.
self.default = int(attrs["default"], base=0)
else:
self.default = None
ufixed_match = Field.ufixed_pattern.match(self.type)
if ufixed_match:
self.type = 'ufixed'
self.fractional_size = int(ufixed_match.group(2))
sfixed_match = Field.sfixed_pattern.match(self.type)
if sfixed_match:
self.type = 'sfixed'
self.fractional_size = int(sfixed_match.group(2))
def is_builtin_type(self):
builtins = [ 'address', 'bool', 'float', 'ufixed',
'offset', 'sfixed', 'offset', 'int', 'uint',
'mbo', 'mbz' ]
return self.type in builtins
def is_struct_type(self):
return self.type in self.parser.structs
def is_enum_type(self):
return self.type in self.parser.enums
def emit_template_struct(self, dim):
if self.type == 'address':
type = 'uint64_t' if self.parser.opencl else '__gen_address_type'
elif self.type == 'bool':
type = 'bool'
elif self.type == 'float':
type = 'float'
elif self.type == 'ufixed':
type = 'float'
elif self.type == 'sfixed':
type = 'float'
elif self.type == 'uint' and self.end - self.start > 32:
type = 'uint64_t'
elif self.type == 'offset':
type = 'uint64_t'
elif self.type == 'int':
type = 'int32_t'
elif self.type == 'uint':
type = 'uint32_t'
elif self.is_struct_type():
type = 'struct ' + self.parser.gen_prefix(safe_name(self.type))
elif self.is_enum_type():
type = 'enum ' + self.parser.gen_prefix(safe_name(self.type))
elif self.type == 'mbo' or self.type == 'mbz':
return
else:
print("#error unhandled type: %s" % self.type)
return
print(" %-36s %s%s;" % (type, self.name, dim))
prefix = self.prefix + '_' if self.prefix else ''
for value in self.values:
name = value.name
if self.prefix and value.name[0] == '_':
name = name[1:]
print("#define %-40s %d" % (prefix + name, value.value))
class Group(object):
def __init__(self, parser, parent, start, count, size):
self.parser = parser
self.parent = parent
self.start = start
self.count = count
self.size = size
self.fields = []
def emit_template_struct(self, dim):
if self.count == 0:
print(" /* variable length fields follow */")
else:
if self.count > 1:
dim = "%s[%d]" % (dim, self.count)
for field in self.fields:
field.emit_template_struct(dim)
class DWord:
def __init__(self):
self.size = 32
self.fields = []
self.address = None
def collect_dwords(self, dwords, start, dim):
for field in self.fields:
if isinstance(field, Group):
if field.count == 1:
field.collect_dwords(dwords, start + field.start, dim)
else:
for i in range(field.count):
field.collect_dwords(dwords,
start + field.start + i * field.size,
"%s[%d]" % (dim, i))
continue
index = (start + field.start) // 32
if not index in dwords:
dwords[index] = self.DWord()
clone = copy.copy(field)
clone.start = clone.start + start
clone.end = clone.end + start
clone.dim = dim
dwords[index].fields.append(clone)
if field.type == "address":
# assert dwords[index].address == None
dwords[index].address = clone
# Coalesce all the dwords covered by this field. The two cases we
# handle are where multiple fields are in a 64 bit word (typically
# and address and a few bits) or where a single struct field
# completely covers multiple dwords.
while index < (start + field.end) // 32:
if index + 1 in dwords and not dwords[index] == dwords[index + 1]:
dwords[index].fields.extend(dwords[index + 1].fields)
dwords[index].size = 64
dwords[index + 1] = dwords[index]
index = index + 1
def collect_dwords_and_length(self, repack=False):
dwords = {}
self.collect_dwords(dwords, 0, "")
# Determine number of dwords in this group. If we have a size, use
# that, since that'll account for MBZ dwords at the end of a group
# (like dword 8 on BDW+ 3DSTATE_HS). Otherwise, use the largest dword
# index we've seen plus one.
if self.size > 0:
length = self.size // 32
elif dwords:
length = max(dwords.keys()) + 1
else:
length = 0
return (dwords, length)
def emit_pack_function(self, dwords, length, repack=False):
for index in range(length):
# Handle MBZ dwords
if not index in dwords:
print("")
print(" dw[%d] = 0;" % index)
continue
# For 64 bit dwords, we aliased the two dword entries in the dword
# dict it occupies. Now that we're emitting the pack function,
# skip the duplicate entries.
dw = dwords[index]
if index > 0 and index - 1 in dwords and dw == dwords[index - 1]:
continue
# Special case: only one field and it's a struct at the beginning
# of the dword. In this case we pack directly into the
# destination. This is the only way we handle embedded structs
# larger than 32 bits.
if len(dw.fields) == 1:
field = dw.fields[0]
name = field.name + field.dim
if field.is_struct_type() and field.start % 32 == 0:
print("")
if repack:
if self.parser.opencl:
print(" %s_repack(&dw[%d], &origin[%d], &values->%s);" %
(self.parser.gen_prefix(safe_name(field.type)), index, index, name))
else:
print(" %s_pack(data, &dw[%d], &origin[%d], &values->%s);" %
(self.parser.gen_prefix(safe_name(field.type)), index, index, name))
else:
if self.parser.opencl:
print(" %s_pack(&dw[%d], &values->%s);" %
(self.parser.gen_prefix(safe_name(field.type)), index, name))
else:
print(" %s_pack(data, &dw[%d], &values->%s);" %
(self.parser.gen_prefix(safe_name(field.type)), index, name))
continue
# Pack any fields of struct type first so we have integer values
# to the dword for those fields.
field_index = 0
for field in dw.fields:
if isinstance(field, Field) and field.is_struct_type():
name = field.name + field.dim
print("")
print(" uint32_t v%d_%d;" % (index, field_index))
if repack:
if self.parser.opencl:
print(" %s_repack(&v%d_%d, &origin[%d], &values->%s);" %
(self.parser.gen_prefix(safe_name(field.type)), index, field_index, index, name))
else:
print(" %s_repack(data, &v%d_%d, &origin[%d], &values->%s);" %
(self.parser.gen_prefix(safe_name(field.type)), index, field_index, index, name))
else:
if self.parser.opencl:
print(" %s_pack(&v%d_%d, &values->%s);" %
(self.parser.gen_prefix(safe_name(field.type)), index, field_index, name))
else:
print(" %s_pack(data, &v%d_%d, &values->%s);" %
(self.parser.gen_prefix(safe_name(field.type)), index, field_index, name))
field_index = field_index + 1
print("")
dword_start = index * 32
if dw.address == None:
address_count = 0
else:
address_count = 1
# Assert in dont_use values
for field in dw.fields:
for value in field.values:
if value.dont_use:
print(" assert(values->%s != %s);" %
(field.name, field.prefix + "_" + value.name))
if dw.size == 32 and dw.address == None:
v = None
print(" dw[%d] =" % index)
elif len(dw.fields) > address_count or repack:
v = "v%d" % index
print(" const uint%d_t %s =" % (dw.size, v))
else:
v = "0"
field_index = 0
non_address_fields = []
if repack:
non_address_fields.append("origin[%d]" % index)
if dw.size > 32:
non_address_fields.append("((uint64_t)origin[%d] << 32)" % (index + 1))
for field in dw.fields:
if field.type != "mbo" and field.type != "mbz" and field.type != "repack":
name = field.name + field.dim
nz = "_nonzero" if field.nonzero else ""
if field.type == "repack":
non_address_fields.append("origin[%d]" % index)
elif field.type == "mbo":
non_address_fields.append("util_bitpack_ones(%d, %d)" % \
(field.start - dword_start, field.end - dword_start))
elif field.type == "mbz":
assert not field.nonzero
elif field.type == "address":
pass
elif field.type == "uint":
non_address_fields.append("util_bitpack_uint%s(values->%s, %d, %d)" % \
(nz, name, field.start - dword_start, field.end - dword_start))
elif field.is_enum_type():
non_address_fields.append("util_bitpack_uint%s(values->%s, %d, %d)" % \
(nz, name, field.start - dword_start, field.end - dword_start))
elif field.type == "int":
non_address_fields.append("util_bitpack_sint%s(values->%s, %d, %d)" % \
(nz, name, field.start - dword_start, field.end - dword_start))
elif field.type == "bool":
non_address_fields.append("util_bitpack_uint%s(values->%s, %d, %d)" % \
(nz, name, field.start - dword_start, field.end - dword_start))
elif field.type == "float":
non_address_fields.append("util_bitpack_float%s(values->%s)" % (nz, name))
elif field.type == "offset":
non_address_fields.append("__gen_offset%s(values->%s, %d, %d)" % \
(nz, name, field.start - dword_start, field.end - dword_start))
elif field.type == 'ufixed':
non_address_fields.append("util_bitpack_ufixed%s(values->%s, %d, %d, %d)" % \
(nz, name, field.start - dword_start, field.end - dword_start, field.fractional_size))
elif field.type == 'sfixed':
non_address_fields.append("util_bitpack_sfixed%s(values->%s, %d, %d, %d)" % \
(nz, name, field.start - dword_start, field.end - dword_start, field.fractional_size))
elif field.is_struct_type():
non_address_fields.append("util_bitpack_uint(v%d_%d, %d, %d)" % \
(index, field_index, field.start - dword_start, field.end - dword_start))
field_index = field_index + 1
else:
non_address_fields.append("/* unhandled field %s, type %s */\n" % \
(name, field.type))
if non_address_fields:
print(" |\n".join(" " + f for f in non_address_fields) + ";")
if dw.size == 32:
if dw.address:
if self.parser.opencl:
print(" dw[%d] = __gen_address(values->%s, %d, %d) | %s;" %
(index, dw.address.name + field.dim,
dw.address.start - dword_start, dw.address.end - dword_start, v))
else:
print(" dw[%d] = __gen_address(data, &dw[%d], values->%s, %s, %d, %d);" %
(index, index, dw.address.name + field.dim, v,
dw.address.start - dword_start, dw.address.end - dword_start))
continue
if dw.address:
v_address = "v%d_address" % index
if self.parser.opencl:
print(" const uint64_t %s =\n __gen_address(values->%s, %d, %d) | %s;" %
(v_address, dw.address.name + field.dim,
dw.address.start - dword_start, dw.address.end - dword_start, v))
else:
print(" const uint64_t %s =\n __gen_address(data, &dw[%d], values->%s, %s, %d, %d);" %
(v_address, index, dw.address.name + field.dim, v,
dw.address.start - dword_start, dw.address.end - dword_start))
if len(dw.fields) > address_count:
print(" dw[%d] = %s;" % (index, v_address))
print(" dw[%d] = (%s >> 32) | (%s >> 32);" % (index + 1, v_address, v))
continue
else:
v = v_address
print(" dw[%d] = %s;" % (index, v))
print(" dw[%d] = %s >> 32;" % (index + 1, v))
class Value(object):
def __init__(self, attrs):
self.name = safe_name(attrs["name"])
self.value = ast.literal_eval(attrs["value"])
self.dont_use = int(attrs["dont_use"]) != 0 if "dont_use" in attrs else False
class Parser(object):
def __init__(self, opencl, repack):
self.instruction = None
self.structs = {}
# Set of enum names we've seen.
self.enums = set()
self.registers = {}
self.opencl = opencl
self.repack = repack
def gen_prefix(self, name):
if name[0] == "_":
return 'GFX%s%s' % (self.gen, name)
return 'GFX%s_%s' % (self.gen, name)
def gen_guard(self):
if self.opencl:
return self.gen_prefix("{0}_CL_PACK_H".format(self.platform))
return self.gen_prefix("{0}_PACK_H".format(self.platform))
def process_item(self, item):
name = item.tag
assert name != "genxml"
attrs = item.attrib
if name in ("instruction", "struct", "register"):
if name == "instruction":
self.instruction = safe_name(attrs["name"])
self.length_bias = int(attrs["bias"])
elif name == "struct":
self.struct = safe_name(attrs["name"])
self.structs[attrs["name"]] = 1
elif name == "register":
self.register = safe_name(attrs["name"])
self.reg_num = num_from_str(attrs["num"])
self.registers[attrs["name"]] = 1
if "length" in attrs:
self.length = int(attrs["length"])
size = self.length * 32
else:
self.length = None
size = 0
self.group = Group(self, None, 0, 1, size)
elif name == "group":
dword = int(attrs["dword"])
offset_bits = int(attrs.get("offset_bits", 0))
start = dword * 32 + offset_bits
group = Group(self, self.group,
start, int(attrs["count"]), int(attrs["size"]))
self.group.fields.append(group)
self.group = group
elif name == "field":
self.group.fields.append(Field(self, attrs))
self.values = []
elif name == "enum":
self.values = []
self.enum = safe_name(attrs["name"])
self.enums.add(attrs["name"])
if "prefix" in attrs:
self.prefix = safe_name(attrs["prefix"])
else:
self.prefix = None
elif name == "value":
self.values.append(Value(attrs))
elif name in ("import", "exclude"):
pass
else:
assert False
for child_item in item:
self.process_item(child_item)
if name == "instruction":
self.emit_instruction()
self.instruction = None
self.group = None
elif name == "struct":
self.emit_struct()
self.struct = None
self.group = None
elif name == "register":
self.emit_register()
self.register = None
self.reg_num = None
self.group = None
elif name == "group":
self.group = self.group.parent
elif name == "field":
self.group.fields[-1].values = self.values
elif name == "enum":
self.emit_enum()
self.enum = None
elif name in ("import", "exclude", "value"):
pass
else:
assert False
def emit_template_struct(self, name, group):
print("struct %s {" % self.gen_prefix(name))
group.emit_template_struct("")
print("};\n")
def emit_pack_function(self, name, group, repack=False):
name = self.gen_prefix(name)
if repack:
if self.opencl:
print(textwrap.dedent("""\
static inline __attribute__((always_inline)) void
%s_repack(__attribute__((unused)) global void * restrict dst,
%s__attribute__((unused)) global const uint32_t * origin,
%s__attribute__((unused)) private const struct %s * restrict values)
{""") % (name, ' ' * len(name), ' ' * len(name), name))
else:
print(textwrap.dedent("""\
static inline __attribute__((always_inline)) void
%s_repack(__attribute__((unused)) __gen_user_data *data,
%s__attribute__((unused)) void * restrict dst,
%s__attribute__((unused)) global const uint32_t * origin,
%s__attribute__((unused)) const struct %s * restrict values)
{""") % (name, ' ' * len(name), ' ' * len(name), ' ' * len(name), name))
else:
if self.opencl:
print(textwrap.dedent("""\
static inline __attribute__((always_inline)) void
%s_pack(__attribute__((unused)) global void * restrict dst,
%s__attribute__((unused)) private const struct %s * restrict values)
{""") % (name, ' ' * len(name), name))
else:
print(textwrap.dedent("""\
static inline __attribute__((always_inline)) void
%s_pack(__attribute__((unused)) __gen_user_data *data,
%s__attribute__((unused)) void * restrict dst,
%s__attribute__((unused)) const struct %s * restrict values)
{""") % (name, ' ' * len(name), ' ' * len(name), name))
(dwords, length) = group.collect_dwords_and_length(repack)
if length:
# Cast dst to make header C++ friendly
type_name = "global uint32_t *" if self.opencl else "uint32_t * restrict"
print(" %s dw = (%s) dst;" % (type_name, type_name))
group.emit_pack_function(dwords, length, repack)
print("}\n")
def emit_instruction(self):
name = self.instruction
if not self.length is None:
print('#define %-33s %6d' %
(self.gen_prefix(name + "_length"), self.length))
print('#define %-33s %6d' %
(self.gen_prefix(name + "_length_bias"), self.length_bias))
default_fields = []
for field in self.group.fields:
if not isinstance(field, Field):
continue
if field.default is None:
continue
if field.is_builtin_type():
default_fields.append(" .%-35s = %6d" % (field.name, field.default))
else:
# Default values should not apply to structures
assert field.is_enum_type()
default_fields.append(" .%-35s = (enum %s) %6d" % (field.name, self.gen_prefix(safe_name(field.type)), field.default))
if default_fields:
print('#define %-40s\\' % (self.gen_prefix(name + '_header')))
print(", \\\n".join(default_fields))
print('')
self.emit_template_struct(self.instruction, self.group)
self.emit_pack_function(self.instruction, self.group)
if self.repack:
self.emit_pack_function(self.instruction, self.group, repack=True)
def emit_register(self):
name = self.register
if not self.reg_num is None:
print('#define %-33s 0x%04x' %
(self.gen_prefix(name + "_num"), self.reg_num))
if not self.length is None:
print('#define %-33s %6d' %
(self.gen_prefix(name + "_length"), self.length))
self.emit_template_struct(self.register, self.group)
self.emit_pack_function(self.register, self.group)
def emit_struct(self):
name = self.struct
if not self.length is None:
print('#define %-33s %6d' %
(self.gen_prefix(name + "_length"), self.length))
self.emit_template_struct(self.struct, self.group)
self.emit_pack_function(self.struct, self.group)
if self.repack:
self.emit_pack_function(self.struct, self.group, repack=True)
def emit_enum(self):
print('enum %s {' % self.gen_prefix(self.enum))
for value in self.values:
if self.prefix:
name = self.prefix + "_" + value.name
else:
name = value.name
print(' %-36s = %6d,' % (name.upper(), value.value))
print('};\n')
def emit_genxml(self, genxml):
root = genxml.et.getroot()
self.platform = root.attrib["name"]
self.gen = root.attrib["gen"].replace('.', '')
print(pack_header % {'license': license, 'platform': self.platform, 'guard': self.gen_guard()})
for item in root:
self.process_item(item)
print('#endif /* %s */' % self.gen_guard())
def parse_args():
p = argparse.ArgumentParser()
p.add_argument('xml_source', metavar='XML_SOURCE',
help="Input xml file")
p.add_argument('--engines', nargs='?', type=str, default='render',
help="Comma-separated list of engines whose instructions should be parsed (default: %(default)s)")
p.add_argument('--include-symbols', nargs='?', type=str, action='store',
help="List of instruction/structures to generate")
p.add_argument('--opencl', action='store_true', help="Generate OpenCL code")
p.add_argument('--repack', action='store_true', help="Emit repacking code")
pargs = p.parse_args()
if pargs.engines is None:
print("No engines specified")
sys.exit(1)
return pargs
def main():
pargs = parse_args()
engines = set(pargs.engines.split(','))
valid_engines = [ 'render', 'blitter', 'video', 'compute' ]
if engines - set(valid_engines):
print("Invalid engine specified, valid engines are:\n")
for e in valid_engines:
print("\t%s" % e)
sys.exit(1)
genxml = intel_genxml.GenXml(pargs.xml_source)
genxml.merge_imported()
genxml.filter_engines(engines)
if pargs.include_symbols:
genxml.filter_symbols(pargs.include_symbols.split(','))
p = Parser(pargs.opencl, pargs.repack)
p.emit_genxml(genxml)
if __name__ == '__main__':
main()
src/intel/genxml/gen_sort_tags.py
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#!/usr/bin/env python3
# Copyright © 2019, 2022 Intel Corporation
# SPDX-License-Identifier: MIT
from __future__ import annotations
import argparse
import copy
import intel_genxml
import pathlib
import xml.etree.ElementTree as et
import typing
def main() -> None:
parser = argparse.ArgumentParser()
parser.add_argument('files', nargs='*',
default=pathlib.Path(__file__).parent.glob('*.xml'),
type=pathlib.Path)
parser.add_argument('--validate', action='store_true')
parser.add_argument('--quiet', action='store_true')
parser.add_argument('--bits-format', choices=['new', 'old'], default='new',
help="'new' for dword/bits; 'old' for start/end (default=%(default)s)")
args: Args = parser.parse_args()
for filename in args.files:
if not args.quiet:
print('Processing {}... '.format(filename), end='', flush=True)
genxml = intel_genxml.GenXml(filename)
if args.bits_format == 'old':
genxml.normalize_to_old_bits_format()
elif args.bits_format == 'new':
genxml.normalize_to_new_bits_format()
if args.validate:
assert genxml.is_equivalent_xml(genxml.sorted_copy()), \
f'{filename} is invalid, run gen_sort_tags.py and commit that'
else:
genxml.sort()
genxml.write_file()
if not args.quiet:
print('done.')
if __name__ == '__main__':
main()
src/intel/genxml/genxml_import.py
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#!/usr/bin/env python3
# Copyright © 2019, 2022 Intel Corporation
# SPDX-License-Identifier: MIT
from __future__ import annotations
import argparse
import copy
import intel_genxml
import pathlib
import typing
def main() -> None:
parser = argparse.ArgumentParser()
parser.add_argument('files', nargs='*',
default=pathlib.Path(__file__).parent.glob('*.xml'),
type=pathlib.Path)
g = parser.add_mutually_exclusive_group(required=True)
g.add_argument('--import', dest='_import', action='store_true',
help='Import and optimize genxml')
g.add_argument('--flatten', action='store_true',
help='Remove imports from genxml')
g.add_argument('--validate', action='store_true',
help='Validate genxml has no items duplicating imports')
parser.add_argument('--quiet', action='store_true')
args: Args = parser.parse_args()
filenames = list(args.files)
intel_genxml.sort_genxml_files(filenames)
for filename in filenames:
if not args.quiet:
print('Processing {}... '.format(filename), end='', flush=True)
genxml = intel_genxml.GenXml(filename)
if args.validate:
original = copy.deepcopy(genxml)
genxml.optimize_xml_import()
assert genxml.is_equivalent_xml(original), \
f'{filename} is invalid, run genxml_import.py to fix it'
elif args._import:
genxml.add_xml_imports()
genxml.optimize_xml_import()
genxml.write_file()
elif args.flatten:
genxml.flatten_imported()
genxml.write_file()
if not args.quiet:
print('done.')
if __name__ == '__main__':
main()
src/intel/genxml/intel_genxml.py
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#!/usr/bin/env python3
# Copyright © 2019, 2022 Intel Corporation
# SPDX-License-Identifier: MIT
from __future__ import annotations
from collections import OrderedDict
import copy
import io
import pathlib
import os.path
import re
import xml.etree.ElementTree as et
import typing
if typing.TYPE_CHECKING:
class Args(typing.Protocol):
files: typing.List[pathlib.Path]
validate: bool
quiet: bool
def get_filename(element: et.Element) -> str:
return element.attrib['filename']
def get_name(element: et.Element) -> str:
return element.attrib['name']
def get_value(element: et.Element) -> int:
return int(element.attrib['value'], 0)
def get_start(element: et.Element) -> int:
attrs = element.attrib
if 'start' in attrs:
return int(attrs['start'], 0)
dword = int(attrs['dword'])
offset = 0
if 'bits' in attrs:
offset = int(attrs['bits'].split(':')[1])
elif 'offset_bits' in attrs:
offset = int(attrs['offset_bits'])
return dword * 32 + offset
BASE_TYPES = {
'address',
'offset',
'int',
'uint',
'bool',
'float',
'mbz',
'mbo',
}
FIXED_PATTERN = re.compile(r"(s|u)(\d+)\.(\d+)")
def is_base_type(name: str) -> bool:
return name in BASE_TYPES or FIXED_PATTERN.match(name) is not None
def add_struct_refs(items: typing.OrderedDict[str, bool], node: et.Element) -> None:
if node.tag == 'field':
if 'type' in node.attrib and not is_base_type(node.attrib['type']):
t = node.attrib['type']
items[t] = True
return
if node.tag not in {'struct', 'group'}:
return
for c in node:
add_struct_refs(items, c)
class Struct(object):
def __init__(self, xml: et.Element):
self.xml = xml
self.name = xml.attrib['name']
self.deps: typing.OrderedDict[str, Struct] = OrderedDict()
def find_deps(self, struct_dict, enum_dict) -> None:
deps: typing.OrderedDict[str, bool] = OrderedDict()
add_struct_refs(deps, self.xml)
for d in deps.keys():
if d in struct_dict:
self.deps[d] = struct_dict[d]
def add_xml(self, items: typing.OrderedDict[str, et.Element]) -> None:
for d in self.deps.values():
d.add_xml(items)
items[self.name] = self.xml
# ordering of the various tag attributes
GENXML_DESC = {
'genxml' : [ 'name', 'gen', ],
'import' : [ 'name', ],
'exclude' : [ 'name', ],
'enum' : [ 'name', 'value', 'prefix', ],
'struct' : [ 'name', 'length', ],
'field' : [ 'name', 'dword', 'bits', 'start', 'end', 'type', 'default', 'prefix', 'nonzero' ],
'instruction' : [ 'name', 'bias', 'length', 'engine', ],
'value' : [ 'name', 'value', 'dont_use', ],
'group' : [ 'count', 'dword', 'offset_bits', 'start', 'size', ],
'register' : [ 'name', 'length', 'num', ],
}
def node_validator(old: et.Element, new: et.Element) -> bool:
"""Compare to ElementTree Element nodes.
There is no builtin equality method, so calling `et.Element == et.Element` is
equivalent to calling `et.Element is et.Element`. We instead want to compare
that the contents are the same, including the order of children and attributes
"""
return (
# Check that the attributes are the same
old.tag == new.tag and
old.text == new.text and
(old.tail or "").strip() == (new.tail or "").strip() and
list(old.attrib.items()) == list(new.attrib.items()) and
len(old) == len(new) and
# check that there are no unexpected attributes
set(new.attrib).issubset(GENXML_DESC[new.tag]) and
# check that the attributes are sorted
list(new.attrib) == list(old.attrib) and
all(node_validator(f, s) for f, s in zip(old, new))
)
def process_attribs(elem: et.Element) -> None:
valid = GENXML_DESC[elem.tag]
# sort and prune attributes
elem.attrib = OrderedDict(sorted(((k, v) for k, v in elem.attrib.items() if k in valid),
key=lambda x: valid.index(x[0])))
for e in elem:
process_attribs(e)
def sort_xml(xml: et.ElementTree) -> None:
genxml = xml.getroot()
imports = xml.findall('import')
enums = sorted(xml.findall('enum'), key=get_name)
enum_dict: typing.Dict[str, et.Element] = {}
for e in enums:
e[:] = sorted(e, key=get_value)
enum_dict[e.attrib['name']] = e
# Structs are a bit annoying because they can refer to each other. We sort
# them alphabetically and then build a graph of dependencies. Finally we go
# through the alphabetically sorted list and print out dependencies first.
structs = sorted(xml.findall('./struct'), key=get_name)
wrapped_struct_dict: typing.Dict[str, Struct] = {}
for s in structs:
s[:] = sorted(s, key=get_start)
ws = Struct(s)
wrapped_struct_dict[ws.name] = ws
for ws in wrapped_struct_dict.values():
ws.find_deps(wrapped_struct_dict, enum_dict)
sorted_structs: typing.OrderedDict[str, et.Element] = OrderedDict()
for s in structs:
_s = wrapped_struct_dict[s.attrib['name']]
_s.add_xml(sorted_structs)
instructions = sorted(xml.findall('./instruction'), key=get_name)
for i in instructions:
i[:] = sorted(i, key=get_start)
registers = sorted(xml.findall('./register'), key=get_name)
for r in registers:
r[:] = sorted(r, key=get_start)
new_elems = (imports + enums + list(sorted_structs.values()) +
instructions + registers)
for n in new_elems:
process_attribs(n)
genxml[:] = new_elems
# `default_imports` documents which files should be imported for our
# genxml files. This is only useful if a genxml file does not already
# include imports.
#
# Basically, this allows the genxml_import.py tool used with the
# --import switch to know which files should be added as an import.
# (genxml_import.py uses GenXml.add_xml_imports, which relies on
# `default_imports`.)
default_imports = OrderedDict([
('gen40.xml', ()),
('gen45.xml', ('gen40.xml',)),
('gen50.xml', ('gen45.xml',)),
('gen60.xml', ('gen50.xml',)),
('gen70.xml', ('gen60.xml',)),
('gen75.xml', ('gen70.xml',)),
('gen80.xml', ('gen75.xml',)),
('gen90.xml', ('gen80.xml',)),
('gen110.xml', ('gen90.xml',)),
('gen120.xml', ('gen110.xml',)),
('gen125.xml', ('gen120.xml',)),
('gen125_rt.xml', ()),
('xe2.xml', ('gen125.xml',)),
('xe2_rt.xml', ('gen125_rt.xml',)),
('xe3.xml', ('xe2.xml',)),
('xe3_rt.xml', ('xe2_rt.xml',)),
('xe3p.xml', ('xe3.xml',)),
('xe3p_rt.xml', ('xe3_rt.xml',)),
])
known_genxml_files = list(default_imports.keys())
def genxml_path_to_key(path):
try:
return known_genxml_files.index(path.name)
except ValueError:
return len(known_genxml_files)
def sort_genxml_files(files):
files.sort(key=genxml_path_to_key)
class GenXml(object):
def __init__(self, filename, import_xml=False, files=None):
if files is not None:
self.files = files
else:
self.files = set()
self.filename = pathlib.Path(filename)
# Assert that the file hasn't already been loaded which would
# indicate a loop in genxml imports, and lead to infinite
# recursion.
assert self.filename not in self.files
self.files.add(self.filename)
self.et = et.parse(self.filename)
if import_xml:
self.merge_imported()
def process_imported(self, merge=False, drop_dupes=False):
"""Processes imported genxml files.
This helper function scans imported genxml files and has two
mutually exclusive operating modes.
If `merge` is True, then items will be merged into the
`self.et` data structure.
If `drop_dupes` is True, then any item that is a duplicate to
an item imported will be droped from the `self.et` data
structure. This is used by `self.optimize_xml_import` to
shrink the size of the genxml file by reducing duplications.
"""
assert merge != drop_dupes
orig_elements = set(self.et.getroot())
name_and_obj = lambda i: (get_name(i), i)
filter_ty = lambda s: filter(lambda i: i.tag == s, orig_elements)
filter_ty_item = lambda s: dict(map(name_and_obj, filter_ty(s)))
# orig_by_tag stores items defined directly in the genxml
# file. If a genxml item is defined in the genxml directly,
# then any imported items of the same name are ignored.
orig_by_tag = {
'enum': filter_ty_item('enum'),
'struct': filter_ty_item('struct'),
'instruction': filter_ty_item('instruction'),
'register': filter_ty_item('register'),
}
for item in orig_elements:
if item.tag == 'import':
assert 'name' in item.attrib
filename = os.path.split(item.attrib['name'])
exceptions = set()
for e in item:
assert e.tag == 'exclude'
exceptions.add(e.attrib['name'])
# We should be careful to restrict loaded files to
# those under the source or build trees. For now, only
# allow siblings of the current xml file.
assert filename[0] == '', 'Directories not allowed with import'
filename = os.path.join(os.path.dirname(self.filename),
filename[1])
assert os.path.exists(filename), f'{self.filename} {filename}'
# Here we load the imported genxml file. We set
# `import_xml` to true so that any imports in the
# imported genxml will be merged during the loading
# process.
#
# The `files` parameter is a set of files that have
# been loaded, and it is used to prevent any cycles
# (infinite recursion) while loading imported genxml
# files.
genxml = GenXml(filename, import_xml=True, files=self.files)
imported_elements = set(genxml.et.getroot())
# `to_add` is a set of items that were imported an
# should be merged into the `self.et` data structure.
# This is only used when the `merge` parameter is
# True.
to_add = set()
# `to_remove` is a set of items that can safely be
# imported since the item is equivalent. This is only
# used when the `drop_duped` parameter is True.
to_remove = set()
for i in imported_elements:
if i.tag not in orig_by_tag:
continue
if i.attrib['name'] in exceptions:
continue
if i.attrib['name'] in orig_by_tag[i.tag]:
if merge:
# An item with this same name was defined
# in the genxml directly. There we should
# ignore (not merge) the imported item.
continue
else:
if drop_dupes:
# Since this item is not the imported
# genxml, we can't consider dropping it.
continue
if merge:
to_add.add(i)
else:
assert drop_dupes
orig_element = orig_by_tag[i.tag][i.attrib['name']]
if not node_validator(i, orig_element):
continue
to_remove.add(orig_element)
if len(to_add) > 0:
# Now that we have scanned through all the items
# in the imported genxml file, if any items were
# found which should be merged, we add them into
# our `self.et` data structure. After this it will
# be as if the items had been directly present in
# the genxml file.
assert len(to_remove) == 0
self.et.getroot().extend(list(to_add))
sort_xml(self.et)
elif len(to_remove) > 0:
self.et.getroot()[:] = list(orig_elements - to_remove)
sort_xml(self.et)
def merge_imported(self):
"""Merge imported items from genxml imports.
Genxml <import> tags specify that elements should be brought
in from another genxml source file. After this function is
called, these elements will become part of the `self.et` data
structure as if the elements had been directly included in the
genxml directly.
Items from imported genxml files will be completely ignore if
an item with the same name is already defined in the genxml
file.
"""
self.process_imported(merge=True)
def flatten_imported(self):
"""Flattens the genxml to not include any imports
Essentially this helper will put the `self.et` into a state
that includes all imported items directly, and does not
contain any <import> tags. This is used by the
genxml_import.py with the --flatten switch to "undo" any
genxml imports.
"""
self.merge_imported()
root = self.et.getroot()
imports = root.findall('import')
for i in imports:
root.remove(i)
def add_xml_imports(self):
"""Adds imports to the genxml file.
Using the `default_imports` structure, we add imports to the
genxml file.
"""
# `imports` is a set of filenames currently imported by the
# genxml.
imports = self.et.findall('import')
imports = set(map(lambda el: el.attrib['name'], imports))
new_elements = []
self_flattened = copy.deepcopy(self)
self_flattened.flatten_imported()
old_names = { el.attrib['name'] for el in self_flattened.et.getroot() }
for import_xml in default_imports.get(self.filename.name, tuple()):
if import_xml in imports:
# This genxml is already imported, so we don't need to
# add it as an import.
continue
el = et.Element('import', {'name': import_xml})
import_path = self.filename.with_name(import_xml)
imported_genxml = GenXml(import_path, import_xml=True)
imported_names = { el.attrib['name']
for el in imported_genxml.et.getroot()
if el.tag != 'import' }
# Importing this genxml could add some new items. When
# adding a genxml import, we don't want to add new items,
# unless they were already in the current genxml. So, we
# put them into a list of items to exclude when importing
# the genxml.
exclude_names = imported_names - old_names
for n in sorted(exclude_names):
el.append(et.Element('exclude', {'name': n}))
new_elements.append(el)
if len(new_elements) > 0:
self.et.getroot().extend(new_elements)
sort_xml(self.et)
def optimize_xml_import(self):
"""Optimizes the genxml by dropping items that can be imported
Scans genxml <import> tags, and loads the imported file. If
any item in the imported file is a duplicate to an item in the
genxml file, then it will be droped from the `self.et` data
structure.
"""
self.process_imported(drop_dupes=True)
def filter_engines(self, engines):
changed = False
items = []
for item in self.et.getroot():
# When an instruction doesn't have the engine specified,
# it is considered to be for all engines. Otherwise, we
# check to see if it's tagged for the engines requested.
if item.tag == 'instruction' and 'engine' in item.attrib:
i_engines = set(item.attrib["engine"].split('|'))
if not (i_engines & engines):
# Drop this instruction because it doesn't support
# the requested engine types.
changed = True
continue
items.append(item)
if changed:
self.et.getroot()[:] = items
def filter_symbols(self, symbol_list):
symbols_allowed = {}
for sym in symbol_list:
symbols_allowed[sym] = sym
changed = False
items = []
for item in self.et.getroot():
if item.tag in ('instruction', 'struct', 'register') and \
item.attrib['name'] not in symbols_allowed:
# Drop the item from the tree
changed = True
continue
items.append(item)
if changed:
self.et.getroot()[:] = items
def sort(self):
sort_xml(self.et)
def sorted_copy(self):
clone = copy.deepcopy(self)
clone.sort()
return clone
def is_equivalent_xml(self, other):
if len(self.et.getroot()) != len(other.et.getroot()):
return False
return all(node_validator(old, new)
for old, new in zip(self.et.getroot(), other.et.getroot()))
def normalize_to_old_bits_format(self):
def convert_elem(elem):
attrs = elem.attrib
if elem.tag == 'field' and 'dword' in attrs and 'bits' in attrs:
dword = int(attrs['dword'])
end_bit, start_bit = map(int, attrs['bits'].split(':'))
attrs['start'] = str(dword * 32 + start_bit)
attrs['end'] = str(dword * 32 + end_bit)
attrs.pop('dword', None)
attrs.pop('bits', None)
elif elem.tag == 'group' and 'dword' in attrs:
dword = int(attrs['dword'])
offset_bits = int(attrs.get('offset_bits', 0))
attrs['start'] = str(dword * 32 + offset_bits)
attrs.pop('dword', None)
attrs.pop('offset_bits', None)
for child in elem:
convert_elem(child)
convert_elem(self.et.getroot())
def normalize_to_new_bits_format(self):
def convert_elem(elem):
attrs = elem.attrib
if elem.tag == 'field' and 'start' in attrs and 'end' in attrs:
dword, start = divmod(int(attrs['start']), 32)
end = int(attrs['end']) - (dword * 32)
attrs['dword'] = str(dword)
attrs['bits'] = f"{end}:{start}"
attrs.pop('start', None)
attrs.pop('end', None)
elif elem.tag == 'group' and 'start' in attrs:
dword, offset_bits = divmod(int(attrs['start']), 32)
attrs['dword'] = str(dword)
if offset_bits:
attrs['offset_bits'] = str(offset_bits)
attrs.pop('start', None)
for child in elem:
convert_elem(child)
convert_elem(self.et.getroot())
def write_file(self):
try:
old_genxml = GenXml(self.filename)
if self.is_equivalent_xml(old_genxml):
return
except Exception:
pass
b_io = io.BytesIO()
et.indent(self.et, space=' ')
self.et.write(b_io, encoding="utf-8", xml_declaration=True)
b_io.write(b'\n')
tmp = self.filename.with_suffix(f'{self.filename.suffix}.tmp')
tmp.write_bytes(b_io.getvalue())
tmp.replace(self.filename)
src/intel/genxml/meson.build
+279
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@@ -0,0 +1,279 @@
# Copyright © 2017 Intel Corporation
# SPDX-License-Identifier: MIT
gen_xml_files = [
'gen40.xml',
'gen45.xml',
'gen50.xml',
'gen60.xml',
'gen70.xml',
'gen75.xml',
'gen80.xml',
'gen90.xml',
'gen110.xml',
'gen120.xml',
'gen125.xml',
'xe2.xml',
'xe3.xml',
'xe3p.xml',
]
gen_xml_rt_files = [
'gen125_rt.xml',
'xe2_rt.xml',
'xe3_rt.xml',
'xe3p_rt.xml',
]
gen_pack_header_deps = files('intel_genxml.py', 'util.py')
foreach f : gen_xml_files + gen_xml_rt_files
gen_pack_header_deps += files(f)
endforeach
genX_xml_h = custom_target(
'genX_xml.h',
input : ['../../util/gen_zipped_xml_file.py', gen_xml_files],
output : 'genX_xml.h',
command : [prog_python, '@INPUT@'],
capture : true,
)
genX_bits_included_symbols = [
# instructions
'COMPUTE_WALKER',
'GPGPU_WALKER',
'MEDIA_CURBE_LOAD',
'MEDIA_INTERFACE_DESCRIPTOR_LOAD',
'MEDIA_STATE_FLUSH',
'MEDIA_VFE_STATE',
'MI_ARB_CHECK',
'3DMESH_3D',
'3DPRIMITIVE',
'3DPRIMITIVE_EXTENDED',
'3DSTATE_CLEAR_PARAMS',
'3DSTATE_CLIP',
'3DSTATE_CLIP_MESH',
'3DSTATE_CONSTANT_ALL',
'3DSTATE_CONSTANT_VS',
'3DSTATE_DS',
'3DSTATE_GS',
'3DSTATE_HS',
'3DSTATE_INDEX_BUFFER',
'3DSTATE_MESH_CONTROL',
'3DSTATE_MESH_DISTRIB',
'3DSTATE_MESH_SHADER',
'3DSTATE_MESH_SHADER_DATA',
'3DSTATE_PRIMITIVE_REPLICATION',
'3DSTATE_PS',
'3DSTATE_PS_BLEND',
'3DSTATE_PS_EXTRA',
'3DSTATE_PUSH_CONSTANT_ALLOC_VS',
'3DSTATE_RASTER',
'3DSTATE_SBE',
'3DSTATE_SBE_MESH',
'3DSTATE_SBE_SWIZ',
'3DSTATE_SF',
'3DSTATE_STREAMOUT',
'3DSTATE_TASK_CONTROL',
'3DSTATE_TASK_REDISTRIB',
'3DSTATE_TASK_SHADER',
'3DSTATE_TASK_SHADER_DATA',
'3DSTATE_TE',
'3DSTATE_URB_ALLOC_MESH',
'3DSTATE_URB_ALLOC_TASK',
'3DSTATE_URB_ALLOC_VS',
'3DSTATE_URB_VS',
'3DSTATE_VF_INSTANCING',
'3DSTATE_VF_SGVS',
'3DSTATE_VF_SGVS_2',
'3DSTATE_VF_TOPOLOGY',
'3DSTATE_VFG',
'3DSTATE_WM',
'3DSTATE_VS',
'PIPE_CONTROL',
'RESOURCE_BARRIER',
# instruction fields
'3DSTATE_CPSIZE_CONTROL_BUFFER::Surface Base Address',
'3DSTATE_CPSIZE_CONTROL_BUFFER::Surface Pitch',
'3DSTATE_DEPTH_BUFFER::Surface Base Address',
'3DSTATE_DEPTH_BUFFER::Surface Pitch',
'3DSTATE_HIER_DEPTH_BUFFER::Surface Base Address',
'3DSTATE_HIER_DEPTH_BUFFER::Surface Pitch',
'3DSTATE_STENCIL_BUFFER::Surface Base Address',
'3DSTATE_STENCIL_BUFFER::Surface Pitch',
'3DSTATE_SO_BUFFER::Surface Base Address',
'3DSTATE_SO_BUFFER::Stream Offset',
'MI_BATCH_BUFFER_START::Batch Buffer Start Address',
'MI_REPORT_PERF_COUNT::Memory Address',
'MI_STORE_DATA_IMM::Address',
'MI_STORE_DATA_IMM::Immediate Data',
'MI_STORE_REGISTER_MEM::Memory Address',
'3DSTATE_DEPTH_BUFFER::Surface Base Address',
'3DSTATE_DEPTH_BUFFER::Surface Pitch',
'3DSTATE_STENCIL_BUFFER::Surface Base Address',
'3DSTATE_STENCIL_BUFFER::Surface Pitch',
'3DSTATE_HIER_DEPTH_BUFFER::Surface Base Address',
'3DSTATE_HIER_DEPTH_BUFFER::Surface Pitch',
'3DSTATE_DS',
'3DSTATE_HS',
'3DSTATE_CLEAR_PARAMS',
'3DSTATE_SO_BUFFER::Surface Base Address',
'3DSTATE_SO_BUFFER::Stream Offset',
'3DSTATE_CPSIZE_CONTROL_BUFFER::Surface Base Address',
'3DSTATE_CPSIZE_CONTROL_BUFFER::Surface Pitch',
'COMPUTE_WALKER::body',
'EXECUTE_INDIRECT_DISPATCH::body',
# structures
'3DSTATE_CONSTANT_ALL_DATA',
'RENDER_SURFACE_STATE::Surface Base Address',
'RENDER_SURFACE_STATE::Surface Pitch',
'RENDER_SURFACE_STATE::Surface QPitch',
'RENDER_SURFACE_STATE::Auxiliary Surface Base Address',
'RENDER_SURFACE_STATE::Auxiliary Surface Pitch',
'RENDER_SURFACE_STATE::Clear Value Address',
'RENDER_SURFACE_STATE::Red Clear Color',
'RENDER_SURFACE_STATE::Green Clear Color',
'RENDER_SURFACE_STATE::Blue Clear Color',
'RENDER_SURFACE_STATE::Alpha Clear Color',
'RENDER_SURFACE_STATE::Width',
'RENDER_SURFACE_STATE::Height',
'RENDER_SURFACE_STATE::Depth',
'RENDER_SURFACE_STATE::Surface Format',
'RENDER_SURFACE_STATE::Surface Type',
'RENDER_SURFACE_STATE::Render Target View Extent',
'RENDER_SURFACE_STATE::Tile Mode',
'CLEAR_COLOR',
'VERTEX_BUFFER_STATE::Buffer Starting Address',
'CPS_STATE',
'INTERFACE_DESCRIPTOR_DATA',
'RT_DISPATCH_GLOBALS::Hit Group Table',
'RT_DISPATCH_GLOBALS::Miss Group Table',
'RT_DISPATCH_GLOBALS::Callable Group Table',
'RT_DISPATCH_GLOBALS::Hit Group Stride',
'RT_DISPATCH_GLOBALS::Miss Group Stride',
'RT_DISPATCH_GLOBALS::Callable Group Stride',
'RT_DISPATCH_GLOBALS::Launch Width',
'RT_DISPATCH_GLOBALS::Launch Height',
'RT_DISPATCH_GLOBALS::Launch Depth',
'SAMPLER_STATE',
'VERTEX_ELEMENT_STATE',
]
genX_bits_h = custom_target(
'genX_bits.h',
input : ['gen_bits_header.py', gen_xml_files, gen_xml_rt_files],
output : 'genX_bits.h',
command : [prog_python, '@INPUT@', '-o', '@OUTPUT@',
'--include-symbols', ','.join(genX_bits_included_symbols)],
depend_files: gen_pack_header_deps
)
gen_xml_pack = []
foreach f : gen_xml_files + gen_xml_rt_files
_name = '@0@_pack.h'.format(f.split('.')[0])
gen_xml_pack += custom_target(
_name,
input : ['gen_pack_header.py', f],
output : _name,
command : [prog_python, '@INPUT@', '--engines=render,blitter,compute'],
capture : true,
depend_files: gen_pack_header_deps
)
endforeach
gen_xml_video_pack = []
foreach f : gen_xml_files
_name = '@0@_video_pack.h'.format(f.split('.')[0])
gen_xml_pack += custom_target(
_name,
input : ['gen_pack_header.py', f],
output : _name,
command : [prog_python, '@INPUT@', '--engines=video'],
capture : true,
depend_files: gen_pack_header_deps
)
endforeach
genX_cl_included_symbols = [
# instructions
'3DMESH_3D',
'3DSTATE_CLIP',
'3DSTATE_CONSTANT_ALL',
'3DSTATE_CONSTANT_VS',
'3DSTATE_DS',
'3DSTATE_GS',
'3DSTATE_HS',
'3DSTATE_INDEX_BUFFER',
'3DSTATE_MESH_CONTROL',
'3DSTATE_MESH_SHADER_DATA',
'3DSTATE_PS',
'3DSTATE_PS_EXTRA',
'3DSTATE_PS_BLEND',
'3DSTATE_RASTER',
'3DSTATE_SF',
'3DSTATE_STREAMOUT',
'3DSTATE_TASK_CONTROL',
'3DSTATE_TASK_SHADER_DATA',
'3DSTATE_TE',
'3DSTATE_VERTEX_BUFFERS',
'3DSTATE_VF_TOPOLOGY',
'3DSTATE_VFG',
'3DSTATE_VS',
'3DSTATE_WM',
'3DPRIMITIVE',
'3DPRIMITIVE_EXTENDED',
'COMPUTE_WALKER',
'GPGPU_WALKER',
'MEDIA_CURBE_LOAD',
'MEDIA_INTERFACE_DESCRIPTOR_LOAD',
'MEDIA_STATE_FLUSH',
'MI_ARB_CHECK',
'MI_BATCH_BUFFER_START',
'MI_STORE_DATA_IMM',
'PIPE_CONTROL',
# structures
'3DSTATE_CONSTANT_ALL_DATA',
'3DSTATE_CONSTANT_BODY',
'BINDLESS_SHADER_RECORD',
'CALL_STACK_HANDLER',
'COMPUTE_WALKER_BODY',
'INTERFACE_DESCRIPTOR_DATA',
'POSTSYNC_DATA',
'RT_DISPATCH_GLOBALS',
'RT_SHADER_TABLE',
'VERTEX_BUFFER_STATE',
]
gen_cl_xml_pack = []
foreach f : gen_xml_files + gen_xml_rt_files
_name = '@0@_cl_pack.h'.format(f.split('.')[0])
gen_cl_xml_pack += custom_target(
_name,
input : ['gen_pack_header.py', f],
output : _name,
command : [prog_python, '@INPUT@', '--engines=render,blitter,compute',
'--opencl', '--repack',
'--include-symbols', ','.join(genX_cl_included_symbols)],
capture : true,
depend_files: gen_pack_header_deps
)
endforeach
gen_pack_header_py = files('gen_pack_header.py')
idep_genxml = declare_dependency(
include_directories : include_directories('.'),
dependencies : idep_mesautil,
sources : [gen_xml_pack, gen_xml_video_pack, gen_cl_xml_pack, genX_bits_h, genX_xml_h]
)
gen_xml_test_files = ['../decoder/tests/gentest.xml']
foreach f : gen_xml_files + gen_xml_rt_files + gen_xml_test_files
test(
'genxml sort @0@'.format(f),
prog_python,
args : [files('gen_sort_tags.py'), files(f), '--validate', '--quiet'],
suite : ['intel'],
)
endforeach
src/intel/genxml/util.py
+38
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@@ -0,0 +1,38 @@
#encoding=utf-8
#
# Copyright © 2020 Intel Corporation
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice (including the next
# paragraph) shall be included in all copies or substantial portions of the
# Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
# IN THE SOFTWARE.
#
# A few utility functions reused across genxml scripts
import re
alphanum_nono = re.compile(r'[ /\[\]()\-:.,=>#&*\'"+\\]+')
def to_alphanum(name):
global alphanum_nono
return alphanum_nono.sub('', name)
def safe_name(name):
name = to_alphanum(name)
if not name[0].isalpha():
name = '_' + name
return name
src/intel/genxml/xe2.xml
+1970
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src/intel/genxml/xe2_rt.xml
+4
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@@ -0,0 +1,4 @@
<?xml version='1.0' encoding='utf-8'?>
<genxml name="RT" gen="20">
<import name="gen125_rt.xml" />
</genxml>
src/intel/genxml/xe3.xml
+881
View File
@@ -0,0 +1,881 @@
<?xml version='1.0' encoding='utf-8'?>
<genxml name="XE3" gen="30">
<import name="xe2.xml">
<exclude name="CPS_STATE" />
<exclude name="3DSTATE_CPS_POINTERS" />
</import>
<enum name="STATE_CPS_COMBINER_OPCODE" prefix="CPS_COMB_OP">
<value name="PASSTHROUGH" value="0" />
<value name="OVERRIDE" value="1" />
<value name="HIGH_QUALITY" value="2" />
<value name="LOW_QUALITY" value="3" />
<value name="RELATIVE" value="4" />
</enum>
<enum name="STATE_CPS_SIZE">
<value name="CPSIZE_1" value="0" />
<value name="CPSIZE_2" value="1" />
<value name="CPSIZE_4" value="2" />
</enum>
<struct name="BLEND_STATE_ENTRY" length="2">
<field name="Write Disable Blue" dword="0" bits="0:0" type="bool" />
<field name="Write Disable Green" dword="0" bits="1:1" type="bool" />
<field name="Write Disable Red" dword="0" bits="2:2" type="bool" />
<field name="Write Disable Alpha" dword="0" bits="3:3" type="bool" />
<field name="Alpha Blend Function" dword="0" bits="7:5" type="3D_Color_Buffer_Blend_Function" />
<field name="Destination Alpha Blend Factor" dword="0" bits="12:8" type="3D_Color_Buffer_Blend_Factor" />
<field name="Source Alpha Blend Factor" dword="0" bits="17:13" type="3D_Color_Buffer_Blend_Factor" />
<field name="Color Blend Function" dword="0" bits="20:18" type="3D_Color_Buffer_Blend_Function" />
<field name="Destination Blend Factor" dword="0" bits="25:21" type="3D_Color_Buffer_Blend_Factor" />
<field name="Source Blend Factor" dword="0" bits="30:26" type="3D_Color_Buffer_Blend_Factor" />
<field name="Color Buffer Blend Enable" dword="0" bits="31:31" type="bool" />
<field name="Post-Blend Color Clamp Enable" dword="1" bits="0:0" type="bool" />
<field name="Pre-Blend Color Clamp Enable" dword="1" bits="1:1" type="bool" />
<field name="Color Clamp Range" dword="1" bits="3:2" type="uint">
<value name="COLORCLAMP_UNORM" value="0" />
<value name="COLORCLAMP_SNORM" value="1" />
<value name="COLORCLAMP_RTFORMAT" value="2" />
</field>
<field name="Pre-Blend Source Only Clamp Enable" dword="1" bits="4:4" type="bool" />
<field name="Simple Float Blend Enable" dword="1" bits="5:5" type="bool" />
<field name="Logic Op Function" dword="1" bits="30:27" type="3D_Logic_Op_Function" />
<field name="Logic Op Enable" dword="1" bits="31:31" type="bool" />
</struct>
<struct name="INTERFACE_DESCRIPTOR_DATA" length="8">
<field name="Kernel Start Pointer" dword="0" bits="31:6" type="offset" />
<field name="Software Exception Enable" dword="2" bits="7:7" type="bool" />
<field name="Illegal Opcode Exception Enable" dword="2" bits="13:13" type="bool" />
<field name="Floating Point Mode" dword="2" bits="16:16" type="uint">
<value name="IEEE-754" value="0" />
<value name="Alternate" value="1" />
</field>
<field name="Single Program Flow" dword="2" bits="18:18" type="bool" />
<field name="Denorm Mode" dword="2" bits="19:19" type="uint">
<value name="Ftz" value="0" />
<value name="SetByKernel" value="1" />
</field>
<field name="Thread Preemption" dword="2" bits="20:20" type="bool" />
<field name="Registers Per Thread" dword="2" bits="30:26" type="uint" />
<field name="Sampler Count" dword="3" bits="4:2" type="uint">
<value name="No samplers used" value="0" />
<value name="Between 1 and 4 samplers used" value="1" />
<value name="Between 5 and 8 samplers used" value="2" />
<value name="Between 9 and 12 samplers used" value="3" />
<value name="Between 13 and 16 samplers used" value="4" />
</field>
<field name="Sampler State Pointer" dword="3" bits="31:5" type="offset" />
<field name="Binding Table Entry Count" dword="4" bits="4:0" type="uint" />
<field name="Binding Table Pointer" dword="4" bits="20:5" type="offset" />
<field name="Number of Threads in GPGPU Thread Group" dword="5" bits="9:0" type="uint" />
<field name="Thread group forward progress guarantee" dword="5" bits="13:13" type="bool" />
<field name="Shared Local Memory Size" dword="5" bits="20:16" type="uint">
<value name="Encodes 0K" value="0" />
<value name="Encodes 1K" value="1" />
<value name="Encodes 2K" value="2" />
<value name="Encodes 4K" value="3" />
<value name="Encodes 8K" value="4" />
<value name="Encodes 16K" value="5" />
<value name="Encodes 32K" value="6" />
<value name="Encodes 64K" value="7" />
<value name="Encodes 96K" value="10" />
<value name="Encodes 128K" value="11" />
<value name="Encodes 192K" value="12" />
<value name="Encodes 256K" value="13" />
<value name="Encodes 384K" value="14" />
</field>
<field name="Rounding Mode" dword="5" bits="23:22" type="uint">
<value name="RTNE" value="0" />
<value name="RU" value="1" />
<value name="RD" value="2" />
<value name="RTZ" value="3" />
</field>
<field name="Thread Group Dispatch Size" dword="5" bits="27:26" type="uint">
<value name="TG size 8" value="0" />
<value name="TG size 4" value="1" />
<value name="TG size 2" value="2" />
<value name="TG size 1" value="3" />
</field>
<field name="Number Of Barriers" dword="5" bits="30:28" type="uint" prefix="BARRIER_SIZE">
<value name="NONE" value="0" />
<value name="B1" value="1" />
<value name="B2" value="2" />
<value name="B4" value="3" />
<value name="B8" value="4" />
<value name="B16" value="5" />
<value name="B24" value="6" />
<value name="B32" value="7" />
</field>
<field name="BTD Mode" dword="5" bits="31:31" type="uint" />
<field name="Preferred SLM Allocation Size" dword="7" bits="3:0" type="PREF_SLM_ALLOCATION_SIZE" />
</struct>
<struct name="COMPUTE_WALKER_BODY" length="39">
<field name="Indirect Data Length" dword="1" bits="16:0" type="uint" />
<field name="L3 prefetch disable" dword="1" bits="17:17" type="bool" />
<field name="Partition Dispatch Parameter" dword="1" bits="29:18" type="uint" />
<field name="Partition Type" dword="1" bits="31:30" type="uint">
<value name="PartitionX" value="1" />
<value name="PartitionY" value="2" />
<value name="PartitionZ" value="3" />
</field>
<field name="Indirect Data Start Address" dword="2" bits="31:6" type="offset" />
<field name="Compute Dispatch All walker Enable" dword="3" bits="0:0" type="uint">
<value name="Disabled" value="0" />
<value name="Enabled" value="1" />
</field>
<field name="Thread Group Batch Size" dword="3" bits="4:3" type="uint">
<value name="TG_BATCH_1" value="0" />
<value name="TG_BATCH_2" value="1" />
<value name="TG_BATCH_4" value="2" />
<value name="TG_BATCH_8" value="3" />
</field>
<field name="Dispatch Walk Order" dword="3" bits="6:5" type="uint">
<value name="Linear Walk" value="0" />
<value name="Y order walk" value="1" />
<value name="Morton Walk" value="2" />
</field>
<field name="Message SIMD" dword="3" bits="18:17" type="uint">
<value name="SIMT16" value="1" />
<value name="SIMT32" value="2" />
</field>
<field name="Tile Layout" dword="3" bits="21:19" type="uint">
<value name="Linear" value="0" />
<value name="TileY 32bpe" value="1" />
<value name="TileY 64bpe" value="2" />
<value name="TileY 128bpe" value="3" />
</field>
<field name="Walk Order" dword="3" bits="24:22" type="uint">
<value name="Walk 012" value="0" />
<value name="Walk 021" value="1" />
<value name="Walk 102" value="2" />
<value name="Walk 120" value="3" />
<value name="Walk 201" value="4" />
<value name="Walk 210" value="5" />
</field>
<field name="Emit Inline Parameter" dword="3" bits="25:25" type="bool" />
<field name="Emit Local" dword="3" bits="28:26" type="uint">
<value name="Emit None" value="0" />
<value name="Emit X" value="1" />
<value name="Emit XY" value="3" />
<value name="Emit XYZ" value="7" />
</field>
<field name="Generate Local ID" dword="3" bits="29:29" type="bool" />
<field name="SIMD Size" dword="3" bits="31:30" type="uint">
<value name="SIMT16" value="1" />
<value name="SIMT32" value="2" />
</field>
<field name="Execution Mask" dword="4" bits="31:0" type="uint" />
<field name="Local X Maximum" dword="5" bits="9:0" type="uint" />
<field name="Local Y Maximum" dword="5" bits="19:10" type="uint" />
<field name="Local Z Maximum" dword="5" bits="29:20" type="uint" />
<field name="Thread Group ID X Dimension" dword="6" bits="31:0" type="uint" />
<field name="Thread Group ID Y Dimension" dword="7" bits="31:0" type="uint" />
<field name="Thread Group ID Z Dimension" dword="8" bits="31:0" type="uint" />
<field name="Thread Group ID Starting X" dword="9" bits="31:0" type="uint" />
<field name="Thread Group ID Starting Y" dword="10" bits="31:0" type="uint" />
<field name="Thread Group ID Starting Z" dword="11" bits="31:0" type="uint" />
<field name="Partition ID" dword="12" bits="31:0" type="uint" />
<field name="Partition Size" dword="13" bits="31:0" type="uint" />
<field name="Preempt X" dword="14" bits="31:0" type="uint" />
<field name="Preempt Y" dword="15" bits="31:0" type="uint" />
<field name="Preempt Z" dword="16" bits="31:0" type="uint" />
<field name="Walker ID" dword="17" bits="3:0" type="uint" />
<field name="Over dispatch TG count" dword="17" bits="23:8" type="uint" />
<field name="Interface Descriptor" dword="18" bits="255:0" type="INTERFACE_DESCRIPTOR_DATA" />
<field name="Post Sync" dword="26" bits="159:0" type="POSTSYNC_DATA" />
<group count="8" dword="31" size="32">
<field name="Inline Data" dword="0" bits="31:0" type="uint" />
</group>
</struct>
<struct name="SAMPLER_STATE" length="4">
<field name="Anisotropic Algorithm" dword="0" bits="0:0" type="uint">
<value name="LEGACY" value="0" />
<value name="EWA Approximation" value="1" />
</field>
<field name="Texture LOD Bias" dword="0" bits="13:1" type="s4.8" />
<field name="Min Mode Filter" dword="0" bits="16:14" type="uint" prefix="MAPFILTER">
<value name="NEAREST" value="0" />
<value name="LINEAR" value="1" />
<value name="ANISOTROPIC" value="2" />
<value name="ANISOTROPIC_FAST" value="3" />
<value name="MONO" value="6" />
</field>
<field name="Mag Mode Filter" dword="0" bits="19:17" type="uint" prefix="MAPFILTER">
<value name="NEAREST" value="0" />
<value name="LINEAR" value="1" />
<value name="ANISOTROPIC" value="2" />
<value name="ANISOTROPIC_FAST" value="3" />
<value name="MONO" value="6" />
</field>
<field name="Mip Mode Filter" dword="0" bits="21:20" type="uint" prefix="MIPFILTER">
<value name="NONE" value="0" />
<value name="NEAREST" value="1" />
<value name="LINEAR" value="3" />
</field>
<field name="Coarse LOD Quality Mode" dword="0" bits="26:22" type="uint" />
<field name="LOD PreClamp Mode" dword="0" bits="28:27" type="uint" prefix="CLAMP_MODE">
<value name="NONE" value="0" />
<value name="OGL" value="2" />
</field>
<field name="Texture Border Color Mode" dword="0" bits="29:29" type="uint">
<value name="DX10/OGL" value="0" />
<value name="DX9" value="1" />
</field>
<field name="CPS LOD Compensation Enable" dword="0" bits="30:30" type="bool" />
<field name="Sampler Disable" dword="0" bits="31:31" type="bool" />
<field name="Cube Surface Control Mode" dword="1" bits="0:0" type="uint">
<value name="PROGRAMMED" value="0" />
<value name="OVERRIDE" value="1" />
</field>
<field name="Shadow Function" dword="1" bits="3:1" type="uint" prefix="PREFILTEROP">
<value name="ALWAYS" value="0" />
<value name="NEVER" value="1" />
<value name="LESS" value="2" />
<value name="EQUAL" value="3" />
<value name="LEQUAL" value="4" />
<value name="GREATER" value="5" />
<value name="NOTEQUAL" value="6" />
<value name="GEQUAL" value="7" />
</field>
<field name="ChromaKey Mode" dword="1" bits="4:4" type="uint">
<value name="KEYFILTER_KILL_ON_ANY_MATCH" value="0" />
<value name="KEYFILTER_REPLACE_BLACK" value="1" />
</field>
<field name="ChromaKey Index" dword="1" bits="6:5" type="uint" />
<field name="ChromaKey Enable" dword="1" bits="7:7" type="bool" />
<field name="Max LOD" dword="1" bits="19:8" type="u4.8" />
<field name="Min LOD" dword="1" bits="31:20" type="u4.8" />
<field name="LOD Clamp Magnification Mode" dword="2" bits="0:0" type="uint">
<value name="MIPNONE" value="0" />
<value name="MIPFILTER" value="1" />
</field>
<field name="SRGB DECODE" dword="2" bits="1:1" type="uint">
<value name="DECODE_EXT" value="0" />
<value name="SKIP_DECODE_EXT" value="1" />
</field>
<field name="Return Filter Weight for Null Texels" dword="2" bits="2:2" type="uint" />
<field name="Return Filter Weight for Border Texels" dword="2" bits="3:3" type="uint" />
<field name="Force gather4 Behavior" dword="2" bits="5:5" type="bool" />
<field name="Border Color Pointer" dword="2" bits="31:6" type="offset" />
<field name="TCZ Address Control Mode" dword="3" bits="2:0" type="Texture Coordinate Mode" />
<field name="TCY Address Control Mode" dword="3" bits="5:3" type="Texture Coordinate Mode" />
<field name="TCX Address Control Mode" dword="3" bits="8:6" type="Texture Coordinate Mode" />
<field name="Reduction Type Enable" dword="3" bits="9:9" type="bool" />
<field name="Non-normalized Coordinate Enable" dword="3" bits="10:10" type="bool" />
<field name="Trilinear Filter Quality" dword="3" bits="12:11" type="uint">
<value name="FULL" value="0" />
<value name="HIGH" value="1" />
<value name="MED" value="2" />
<value name="LOW" value="3" />
</field>
<field name="R Address Min Filter Rounding Enable" dword="3" bits="13:13" type="bool" />
<field name="R Address Mag Filter Rounding Enable" dword="3" bits="14:14" type="bool" />
<field name="V Address Min Filter Rounding Enable" dword="3" bits="15:15" type="bool" />
<field name="V Address Mag Filter Rounding Enable" dword="3" bits="16:16" type="bool" />
<field name="U Address Min Filter Rounding Enable" dword="3" bits="17:17" type="bool" />
<field name="U Address Mag Filter Rounding Enable" dword="3" bits="18:18" type="bool" />
<field name="Maximum Anisotropy" dword="3" bits="21:19" type="uint">
<value name="RATIO 2:1" value="0" />
<value name="RATIO 4:1" value="1" />
<value name="RATIO 6:1" value="2" />
<value name="RATIO 8:1" value="3" />
<value name="RATIO 10:1" value="4" />
<value name="RATIO 12:1" value="5" />
<value name="RATIO 14:1" value="6" />
<value name="RATIO 16:1" value="7" />
</field>
<field name="Reduction Type" dword="3" bits="23:22" type="uint">
<value name="STD_FILTER" value="0" />
<value name="COMPARISON" value="1" />
<value name="MINIMUM" value="2" />
<value name="MAXIMUM" value="3" />
</field>
<field name="Allow Low Quality LOD Calculation" dword="3" bits="24:24" type="bool" />
<field name="Low Quality Filter" dword="3" bits="26:26" type="bool" />
</struct>
<instruction name="3DSTATE_BTD" bias="2" length="6" engine="render|compute">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="4" />
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="6" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="1" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="0" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
<field name="Dispatch Timeout Counter" dword="1" bits="2:0" type="uint">
<value name="64 clocks" value="0" />
<value name="128 clocks" value="1" />
<value name="192 clocks" value="2" />
<value name="256 clocks" value="3" />
<value name="512 clocks" value="4" />
<value name="1024 clocks" value="5" />
<value name="2048 clocks" value="6" />
<value name="4096 clocks" value="7" />
</field>
<field name="Controls the maximum number of outstanding Ray Queries per SS" dword="1" bits="8:7" type="uint" prefix="RAYS_QUERIES_OUTSTANDING">
<value name="128" value="0" />
<value name="256" value="1" />
<value name="512" value="2" />
<value name="1024" value="3" />
</field>
<field name="Dynamic stack management mechanism MISS PENALTY" dword="1" bits="11:9" type="uint" prefix="MISS_PENALTY">
<value name="128" value="7" />
<value name="64" value="6" />
<value name="32" value="5" />
<value name="16" value="4" />
<value name="8" value="3" />
<value name="4" value="2" />
<value name="2" value="1" />
<value name="1" value="0" />
</field>
<field name="Dynamic stack management mechanism HIT REWARD" dword="1" bits="14:12" type="uint" prefix="HIT_REWARD">
<value name="128" value="7" />
<value name="64" value="6" />
<value name="32" value="5" />
<value name="16" value="4" />
<value name="8" value="3" />
<value name="4" value="2" />
<value name="2" value="1" />
<value name="1" value="0" />
</field>
<field name="Dynamic stack management mechanism SCALING FACTOR" dword="1" bits="17:15" type="uint" prefix="SCALING_FACTOR">
<value name="128" value="7" />
<value name="64" value="6" />
<value name="32" value="5" />
<value name="16" value="4" />
<value name="8" value="3" />
<value name="4" value="2" />
<value name="2" value="1" />
<value name="1" value="0" />
</field>
<field name="Dynamic stack management mechanism REDUCTION CAP" dword="1" bits="20:18" type="uint" prefix="REDUCTION_CAP">
<value name="1024" value="7" />
<value name="896" value="6" />
<value name="768" value="5" />
<value name="640" value="4" />
<value name="512" value="3" />
<value name="384" value="2" />
<value name="256" value="1" />
<value name="128" value="0" />
</field>
<field name="RT Mem Structures 64b Mode Enable" dword="1" bits="30:30" type="bool" />
<field name="BTD Mid thread preemption" dword="1" bits="31:31" type="bool" />
<field name="Per DSS Memory Backed Buffer Size" dword="2" bits="2:0" type="uint" default="6">
<value name="2KB" value="0" />
<value name="4KB" value="1" />
<value name="8KB" value="2" />
<value name="16KB" value="3" />
<value name="32KB" value="4" />
<value name="64KB" value="5" />
<value name="128KB" value="6" />
</field>
<field name="Memory Backed Buffer Base Pointer" dword="2" bits="63:10" type="address" />
<field name="Scratch Space Buffer" dword="4" bits="31:10" type="uint" />
</instruction>
<instruction name="3DSTATE_COARSE_PIXEL" bias="2" length="2" engine="render">
<field name="DWord Length" dword="0" bits="15:0" type="uint" default="0" />
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="137" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="0" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="3" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
<field name="CPSizeX" dword="1" bits="1:0" type="STATE_CPS_SIZE" />
<field name="CPSizeY" dword="1" bits="3:2" type="STATE_CPS_SIZE" />
<field name="CPSizeCombiner1Opcode" dword="1" bits="6:4" type="STATE_CPS_COMBINER_OPCODE" />
<field name="CPSizeCombiner0Opcode" dword="1" bits="9:7" type="STATE_CPS_COMBINER_OPCODE" />
<field name="Disable CPS Pointers" dword="1" bits="31:31" type="bool" />
</instruction>
<instruction name="3DSTATE_DS" bias="2" length="11" engine="render">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="9" />
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="29" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="0" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="3" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
<field name="Kernel Start Pointer" dword="1" bits="63:6" type="offset" />
<field name="Registers Per Thread" dword="3" bits="5:0" type="uint" />
<field name="Software Exception Enable" dword="3" bits="7:7" type="bool" />
<field name="Illegal Opcode Exception Enable" dword="3" bits="13:13" type="bool" />
<field name="Accesses UAV" dword="3" bits="14:14" type="bool" />
<field name="Floating Point Mode" dword="3" bits="16:16" type="uint">
<value name="IEEE-754" value="0" />
<value name="Alternate" value="1" />
</field>
<field name="Thread Dispatch Priority" dword="3" bits="17:17" type="uint">
<value name="High" value="1" />
</field>
<field name="Binding Table Entry Count" dword="3" bits="25:18" type="uint" />
<field name="Sampler Count" dword="3" bits="29:27" type="uint">
<value name="No Samplers" value="0" />
<value name="1-4 Samplers" value="1" />
<value name="5-8 Samplers" value="2" />
<value name="9-12 Samplers" value="3" />
<value name="13-16 Samplers" value="4" />
</field>
<field name="Vector Mask Enable" dword="3" bits="30:30" type="bool" />
<field name="Scratch Space Buffer" dword="4" bits="31:10" type="uint" />
<field name="Patch URB Entry Read Offset" dword="6" bits="9:4" type="uint" />
<field name="Patch URB Entry Read Length" dword="6" bits="17:11" type="uint" />
<field name="Dispatch GRF Start Register For URB Data" dword="6" bits="24:20" type="uint" />
<field name="Enable" dword="7" bits="0:0" type="bool" />
<field name="Cache Disable" dword="7" bits="1:1" type="bool" />
<field name="Compute W Coordinate Enable" dword="7" bits="2:2" type="bool" />
<field name="Dispatch Mode" dword="7" bits="4:3" type="uint" prefix="DISPATCH_MODE">
<value name="SIMD8_SINGLE_PATCH" value="1" />
<value name="SIMD8_SINGLE_OR_DUAL_PATCH" value="2" />
</field>
<field name="Primitive ID Not Required" dword="7" bits="9:9" type="bool" />
<field name="Statistics Enable" dword="7" bits="10:10" type="bool" />
<field name="Maximum Number of Threads" dword="7" bits="30:21" type="uint" />
<field name="User Clip Distance Cull Test Enable Bitmask" dword="8" bits="7:0" type="uint" />
<field name="User Clip Distance Clip Test Enable Bitmask" dword="8" bits="15:8" type="uint" />
<field name="Vertex URB Entry Output Length" dword="8" bits="20:16" type="uint" />
<field name="Vertex URB Entry Output Read Offset" dword="8" bits="26:21" type="uint" />
<field name="QUAD_PATCH Kernel Start Pointer" dword="9" bits="63:6" type="offset" />
</instruction>
<instruction name="3DSTATE_GS" bias="2" length="10" engine="render">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="8" />
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="17" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="0" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="3" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
<field name="Kernel Start Pointer" dword="1" bits="63:6" type="offset" />
<field name="Expected Vertex Count" dword="3" bits="5:0" type="uint" />
<field name="Software Exception Enable" dword="3" bits="7:7" type="bool" />
<field name="Mask Stack Exception Enable" dword="3" bits="11:11" type="bool" />
<field name="Accesses UAV" dword="3" bits="12:12" type="bool" />
<field name="Illegal Opcode Exception Enable" dword="3" bits="13:13" type="bool" />
<field name="Floating Point Mode" dword="3" bits="16:16" type="uint">
<value name="IEEE-754" value="0" />
<value name="Alternate" value="1" />
</field>
<field name="Thread Dispatch Priority" dword="3" bits="17:17" type="uint">
<value name="Normal" value="0" />
<value name="High" value="1" />
</field>
<field name="Binding Table Entry Count" dword="3" bits="25:18" type="uint" />
<field name="Sampler Count" dword="3" bits="29:27" type="uint">
<value name="No Samplers" value="0" />
<value name="1-4 Samplers" value="1" />
<value name="5-8 Samplers" value="2" />
<value name="9-12 Samplers" value="3" />
<value name="13-16 Samplers" value="4" />
</field>
<field name="Vector Mask Enable" dword="3" bits="30:30" type="uint">
<value name="Dmask" value="0" />
</field>
<field name="Single Program Flow" dword="3" bits="31:31" type="bool" />
<field name="Scratch Space Buffer" dword="4" bits="31:10" type="uint" />
<field name="Dispatch GRF Start Register For URB Data" dword="6" bits="3:0" type="uint" />
<field name="Vertex URB Entry Read Offset" dword="6" bits="9:4" type="uint" />
<field name="Include Vertex Handles" dword="6" bits="10:10" type="bool" />
<field name="Vertex URB Entry Read Length" dword="6" bits="16:11" type="uint" />
<field name="Output Topology" dword="6" bits="22:17" type="3D_Prim_Topo_Type" />
<field name="Output Vertex Size" dword="6" bits="28:23" type="uint" />
<field name="Dispatch GRF Start Register For URB Data [5:4]" dword="6" bits="30:29" type="uint" />
<field name="Enable" dword="7" bits="0:0" type="bool" />
<field name="Discard Adjacency" dword="7" bits="1:1" type="bool" />
<field name="Reorder Mode" dword="7" bits="2:2" type="uint">
<value name="LEADING" value="0" />
<value name="TRAILING" value="1" />
</field>
<field name="Hint" dword="7" bits="3:3" type="bool" />
<field name="Include Primitive ID" dword="7" bits="4:4" type="bool" />
<field name="Invocations Increment Value" dword="7" bits="9:5" type="uint" />
<field name="Statistics Enable" dword="7" bits="10:10" type="bool" />
<field name="Default Stream Id" dword="7" bits="14:13" type="uint" />
<field name="Instance Control" dword="7" bits="19:15" type="uint" />
<field name="Control Data Header Size" dword="7" bits="23:20" type="uint" />
<field name="Registers Per Thread" dword="7" bits="31:26" type="uint" />
<field name="Maximum Number of Threads" dword="8" bits="8:0" type="uint" />
<field name="Static Output Vertex Count" dword="8" bits="26:16" type="uint" />
<field name="Static Output" dword="8" bits="30:30" type="bool" />
<field name="Control Data Format" dword="8" bits="31:31" type="uint">
<value name="CUT" value="0" />
<value name="SID" value="1" />
</field>
<field name="User Clip Distance Cull Test Enable Bitmask" dword="9" bits="7:0" type="uint" />
<field name="User Clip Distance Clip Test Enable Bitmask" dword="9" bits="15:8" type="uint" />
<field name="Vertex URB Entry Output Length" dword="9" bits="20:16" type="uint" />
<field name="Vertex URB Entry Output Read Offset" dword="9" bits="26:21" type="uint" />
</instruction>
<instruction name="3DSTATE_HS" bias="2" length="8" engine="render">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="6" />
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="27" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="0" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="3" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
<field name="Patch Count Threshold" dword="1" bits="3:0" type="uint" />
<field name="Registers Per Thread" dword="1" bits="9:4" type="uint" />
<field name="Software Exception Enable" dword="1" bits="12:12" type="bool" />
<field name="Illegal Opcode Exception Enable" dword="1" bits="13:13" type="bool" />
<field name="Floating Point Mode" dword="1" bits="16:16" type="uint">
<value name="IEEE-754" value="0" />
<value name="alternate" value="1" />
</field>
<field name="Thread Dispatch Priority" dword="1" bits="17:17" type="uint">
<value name="Normal" value="0" />
<value name="High" value="1" />
</field>
<field name="Binding Table Entry Count" dword="1" bits="25:18" type="uint" />
<field name="Sampler Count" dword="1" bits="29:27" type="uint">
<value name="No Samplers" value="0" />
<value name="1-4 Samplers" value="1" />
<value name="5-8 Samplers" value="2" />
<value name="9-12 Samplers" value="3" />
<value name="13-16 Samplers" value="4" />
</field>
<field name="Instance Count" dword="2" bits="4:0" type="uint" />
<field name="Maximum Number of Threads" dword="2" bits="16:8" type="uint" />
<field name="Statistics Enable" dword="2" bits="29:29" type="bool" />
<field name="Enable" dword="2" bits="31:31" type="bool" />
<field name="Kernel Start Pointer" dword="3" bits="63:6" type="offset" />
<field name="Scratch Space Buffer" dword="5" bits="31:10" type="uint" />
<field name="Include Primitive ID" dword="7" bits="0:0" type="bool" />
<field name="Vertex URB Entry Read Offset" dword="7" bits="9:4" type="uint" />
<field name="Vertex URB Entry Read Length" dword="7" bits="16:11" type="uint" />
<field name="Dispatch GRF Start Register For URB Data" dword="7" bits="23:19" type="uint" />
<field name="Include Vertex Handles" dword="7" bits="24:24" type="bool" />
<field name="Accesses UAV" dword="7" bits="25:25" type="bool" />
<field name="Vector Mask Enable" dword="7" bits="26:26" type="uint">
<value name="Dmask" value="0" />
</field>
<field name="Single Program Flow" dword="7" bits="27:27" type="bool" />
<field name="Dispatch GRF Start Register For URB Data [5]" dword="7" bits="28:28" type="uint" />
</instruction>
<instruction name="3DSTATE_MESH_SHADER" bias="2" length="8" engine="render">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="6" />
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="122" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="0" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="3" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
<field name="Kernel Start Pointer" dword="1" bits="63:6" type="offset" />
<field name="Local X Maximum" dword="3" bits="9:0" type="uint" />
<field name="Software Exception Enable" dword="3" bits="10:10" type="bool" />
<field name="Mask Stack Exception Enable" dword="3" bits="11:11" type="bool" />
<field name="Illegal Opcode Exception Enable" dword="3" bits="13:13" type="bool" />
<field name="Floating Point Mode" dword="3" bits="16:16" type="uint">
<value name="IEEE-754" value="0" />
<value name="Alternate" value="1" />
</field>
<field name="Single Program Flow" dword="3" bits="18:18" type="uint" />
<field name="Denorm Mode" dword="3" bits="19:19" type="uint">
<value name="Ftz" value="0" />
<value name="SetByKernel" value="1" />
</field>
<field name="Registers Per Thread" dword="3" bits="25:20" type="uint" />
<field name="Number of Threads in GPGPU Thread Group" dword="4" bits="9:0" type="uint" />
<field name="Shared Local Memory Size" dword="4" bits="20:16" type="uint" />
<field name="Rounding Mode" dword="4" bits="23:22" type="uint">
<value name="RTNE" value="0" />
<value name="RU" value="1" />
<value name="RD" value="2" />
<value name="RTZ" value="3" />
</field>
<field name="Preferred SLM Allocation Size" dword="4" bits="27:24" type="PREF_SLM_ALLOCATION_SIZE" />
<field name="Number of Barriers" dword="4" bits="30:28" type="uint" />
<field name="Indirect Data Length" dword="5" bits="16:0" type="uint" />
<field name="L3 Prefetch Disable" dword="5" bits="17:17" type="bool" />
<field name="Emit Local ID X" dword="5" bits="18:18" type="bool" />
<field name="Emit Inline Parameter" dword="5" bits="19:19" type="bool" />
<field name="Systolic Mode Enable" dword="5" bits="20:20" type="bool" />
<field name="Accesses UAV" dword="5" bits="21:21" type="bool" />
<field name="XP0 Required" dword="5" bits="22:22" type="uint" />
<field name="Message SIMD" dword="5" bits="29:28" type="uint">
<value name="SIMD16" value="1" />
<value name="SIMD32" value="2" />
</field>
<field name="SIMD Size" dword="5" bits="31:30" type="uint">
<value name="SIMD16" value="1" />
<value name="SIMD32" value="2" />
</field>
<field name="Execution Mask" dword="6" bits="31:0" type="uint" />
<field name="Maximum Primitive Count" dword="7" bits="9:0" type="uint" />
<field name="Per-Primitive Data Pitch" dword="7" bits="16:12" type="uint" />
<field name="Per-Vertex Data Pitch" dword="7" bits="24:20" type="uint" />
<field name="Index Format" dword="7" bits="27:25" type="uint" prefix="INDEX">
<value name="U888X" value="0" />
<value name="U101010X" value="1" />
<value name="U8" value="4" />
<value name="U16" value="5" />
<value name="U32" value="3" />
</field>
<field name="Output Topology" dword="7" bits="29:28" type="uint" prefix="OUTPUT">
<value name="POINT" value="0" />
<value name="LINE" value="1" />
<value name="TRI" value="2" />
</field>
<field name="Per-Primitive Data Present" dword="7" bits="31:31" type="uint" />
</instruction>
<instruction name="3DSTATE_PS" bias="2" length="12" engine="render">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="10" />
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="32" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="0" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="3" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
<field name="Kernel 0 Enable" dword="1" bits="0:0" type="bool" />
<field name="Kernel[0] : SIMD Width" dword="1" bits="1:1" type="uint" prefix="PS">
<value name="SIMD16" value="0" />
<value name="SIMD32" value="1" />
</field>
<field name="Kernel Start Pointer 0" dword="1" bits="63:6" type="offset" />
<field name="Registers Per Thread" dword="3" bits="5:0" type="uint" />
<field name="Software Exception Enable" dword="3" bits="7:7" type="bool" />
<field name="Mask Stack Exception Enable" dword="3" bits="11:11" type="bool" />
<field name="Illegal Opcode Exception Enable" dword="3" bits="13:13" type="bool" />
<field name="Rounding Mode" dword="3" bits="15:14" type="uint">
<value name="RTNE" value="0" />
<value name="RU" value="1" />
<value name="RD" value="2" />
<value name="RTZ" value="3" />
</field>
<field name="Floating Point Mode" dword="3" bits="16:16" type="uint">
<value name="IEEE-754" value="0" />
<value name="Alternate" value="1" />
</field>
<field name="Thread Dispatch Priority" dword="3" bits="17:17" type="uint">
<value name="Normal" value="0" />
<value name="High" value="1" />
</field>
<field name="Binding Table Entry Count" dword="3" bits="25:18" type="uint" />
<field name="Single Precision Denormal Mode" dword="3" bits="26:26" type="uint">
<value name="Flushed to Zero" value="0" />
<value name="Retained" value="1" />
</field>
<field name="Sampler Count" dword="3" bits="29:27" type="uint">
<value name="No Samplers" value="0" />
<value name="1-4 Samplers" value="1" />
<value name="5-8 Samplers" value="2" />
<value name="9-12 Samplers" value="3" />
<value name="13-16 Samplers" value="4" />
</field>
<field name="Vector Mask Enable" dword="3" bits="30:30" type="uint">
<value name="Dmask" value="0" />
<value name="Vmask" value="1" />
</field>
<field name="Single Program Flow" dword="3" bits="31:31" type="uint">
<value name="Multiple" value="0" />
<value name="Single" value="1" />
</field>
<field name="Scratch Space Buffer" dword="4" bits="31:10" type="uint" />
<field name="Position XY Offset Select" dword="6" bits="4:3" type="uint">
<value name="POSOFFSET_NONE" value="0" />
<value name="POSOFFSET_CENTROID" value="2" />
<value name="POSOFFSET_SAMPLE" value="3" />
</field>
<field name="Render Target Resolve Type" dword="6" bits="7:6" type="uint">
<value name="RESOLVE_DISABLED" value="0" />
</field>
<field name="Render Target Fast Clear Enable" dword="6" bits="8:8" type="bool" />
<field name="Overlapping Subspans Enable" dword="6" bits="9:9" type="bool" />
<field name="3D Scoreboard Address Size select" dword="6" bits="10:10" type="uint">
<value name="2x2" value="0" />
<value name="4x2" value="1" />
</field>
<field name="Clear/Resolve BTI for Render Target" dword="6" bits="19:12" type="uint" />
<field name="Pixel Scoreboard Disable" dword="6" bits="21:21" type="bool" />
<field name="Maximum Number of Threads Per PSD" dword="6" bits="31:23" type="uint" />
<field name="Dispatch GRF Start Register For Constant/Setup Data 1" dword="7" bits="15:8" type="uint" />
<field name="Dispatch GRF Start Register For Constant/Setup Data 0" dword="7" bits="23:16" type="uint" />
<field name="Kernel[0] : Poly Packing Policy" dword="7" bits="26:24" type="uint">
<value name="POLY_PACK4_DYNAMIC" value="0" />
<value name="POLY_PACK8_DYNAMIC" value="1" />
<value name="POLY_PACK16_DYNAMIC" value="2" />
<value name="POLY_PACK16_FIXED" value="3" />
<value name="POLY_PACK8_FIXED" value="4" />
</field>
<field name="Kernel[0] : Maximum Polys per Thread" dword="7" bits="29:27" type="uint" />
<field name="Kernel 1 Selection Priority" dword="7" bits="31:31" type="uint">
<value name="PRI_SIMD" value="0" />
<value name="PRI_POLY" value="1" />
</field>
<field name="Kernel 1 Enable" dword="8" bits="0:0" type="bool" />
<field name="Kernel[1] : SIMD Width" dword="8" bits="1:1" type="uint" prefix="PS">
<value name="SIMD16" value="0" />
<value name="SIMD32" value="1" />
</field>
<field name="Kernel Start Pointer 1" dword="8" bits="63:6" type="offset" />
</instruction>
<instruction name="3DSTATE_TASK_SHADER" bias="2" length="7" engine="render">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="5" />
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="125" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="0" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="3" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
<field name="Kernel Start Pointer" dword="1" bits="63:6" type="offset" />
<field name="Local X Maximum" dword="3" bits="9:0" type="uint" />
<field name="Software Exception Enable" dword="3" bits="10:10" type="bool" />
<field name="Mask Stack Exception Enable" dword="3" bits="11:11" type="bool" />
<field name="Illegal Opcode Exception Enable" dword="3" bits="13:13" type="bool" />
<field name="Floating Point Mode" dword="3" bits="16:16" type="uint">
<value name="IEEE-754" value="0" />
<value name="Alternate" value="1" />
</field>
<field name="Single Program Flow" dword="3" bits="18:18" type="uint" />
<field name="Denorm Mode" dword="3" bits="19:19" type="uint">
<value name="Ftz" value="0" />
<value name="SetByKernel" value="1" />
</field>
<field name="Registers Per Thread" dword="3" bits="25:20" type="uint" />
<field name="Number of Threads in GPGPU Thread Group" dword="4" bits="9:0" type="uint" />
<field name="Shared Local Memory Size" dword="4" bits="20:16" type="uint" />
<field name="Barrier Enable" dword="4" bits="21:21" type="bool" />
<field name="Rounding Mode" dword="4" bits="23:22" type="uint">
<value name="RTNE" value="0" />
<value name="RU" value="1" />
<value name="RD" value="2" />
<value name="RTZ" value="3" />
</field>
<field name="Preferred SLM Allocation Size" dword="4" bits="27:24" type="uint" />
<field name="Number of Barriers" dword="4" bits="30:28" type="uint" />
<field name="Indirect Data Length" dword="5" bits="16:0" type="uint" />
<field name="L3 Prefetch Disable" dword="5" bits="17:17" type="bool" />
<field name="Emit Local ID X" dword="5" bits="18:18" type="bool" />
<field name="Emit Inline Parameter" dword="5" bits="19:19" type="bool" />
<field name="Systolic Mode Enable" dword="5" bits="20:20" type="bool" />
<field name="Accesses UAV" dword="5" bits="21:21" type="bool" />
<field name="XP0 Required" dword="5" bits="22:22" type="uint" />
<field name="Message SIMD" dword="5" bits="29:28" type="uint">
<value name="SIMD16" value="1" />
<value name="SIMD32" value="2" />
</field>
<field name="SIMD Size" dword="5" bits="31:30" type="uint">
<value name="SIMD16" value="1" />
<value name="SIMD32" value="2" />
</field>
<field name="Execution Mask" dword="6" bits="31:0" type="uint" />
</instruction>
<instruction name="3DSTATE_VS" bias="2" length="9" engine="render">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="7" />
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="16" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="0" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="3" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
<field name="Kernel Start Pointer" dword="1" bits="63:6" type="offset" />
<field name="Registers Per Thread" dword="3" bits="5:0" type="uint" />
<field name="Software Exception Enable" dword="3" bits="7:7" type="bool" />
<field name="Accesses UAV" dword="3" bits="12:12" type="bool" />
<field name="Illegal Opcode Exception Enable" dword="3" bits="13:13" type="bool" />
<field name="Floating Point Mode" dword="3" bits="16:16" type="uint">
<value name="IEEE-754" value="0" />
<value name="Alternate" value="1" />
</field>
<field name="Thread Dispatch Priority" dword="3" bits="17:17" type="uint">
<value name="Normal" value="0" />
<value name="High" value="1" />
</field>
<field name="Binding Table Entry Count" dword="3" bits="25:18" type="uint" />
<field name="Sampler Count" dword="3" bits="29:27" type="uint">
<value name="No Samplers" value="0" />
<value name="1-4 Samplers" value="1" />
<value name="5-8 Samplers" value="2" />
<value name="9-12 Samplers" value="3" />
<value name="13-16 Samplers" value="4" />
</field>
<field name="Vector Mask Enable" dword="3" bits="30:30" type="uint">
<value name="Dmask" value="0" />
</field>
<field name="Scratch Space Buffer" dword="4" bits="31:10" type="uint" />
<field name="Vertex URB Entry Read Offset" dword="6" bits="9:4" type="uint" />
<field name="Vertex URB Entry Read Length" dword="6" bits="16:11" type="uint" />
<field name="Dispatch GRF Start Register For URB Data" dword="6" bits="24:20" type="uint" />
<field name="Enable" dword="7" bits="0:0" type="bool" />
<field name="Vertex Cache Disable" dword="7" bits="1:1" type="bool" />
<field name="Single Instance Dispatch Enable" dword="7" bits="9:9" type="bool" />
<field name="Statistics Enable" dword="7" bits="10:10" type="bool" />
<field name="Maximum Number of Threads" dword="7" bits="31:22" type="uint" />
<field name="User Clip Distance Cull Test Enable Bitmask" dword="8" bits="7:0" type="uint" />
<field name="User Clip Distance Clip Test Enable Bitmask" dword="8" bits="15:8" type="uint" />
<field name="Vertex URB Entry Output Length" dword="8" bits="20:16" type="uint" />
<field name="Vertex URB Entry Output Read Offset" dword="8" bits="26:21" type="uint" />
</instruction>
<instruction name="CFE_STATE" bias="2" length="6" engine="render|compute">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="4" />
<field name="CFE SubOpcode Variant" dword="0" bits="17:16" type="uint" default="0" />
<field name="CFE SubOpcode" dword="0" bits="23:18" type="uint" default="0" />
<field name="Compute Command Opcode" dword="0" bits="26:24" type="uint" default="2" />
<field name="Pipeline" dword="0" bits="28:27" type="uint" default="2" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
<field name="Scratch Space Buffer" dword="1" bits="31:10" type="uint" />
<field name="Stack ID Control" dword="3" bits="1:0" type="uint">
<value name="StackIDs 2048" value="0" />
<value name="StackIDs 1024" value="1" />
<value name="StackIDs 512" value="2" />
<value name="StackIDs 256" value="3" />
</field>
<field name="Dynamic Stack ID Control" dword="3" bits="2:2" type="bool" />
<field name="Compute Dispatch All walker Enable" dword="3" bits="12:12" type="bool" />
<field name="Single Slice Dispatch CCS Mode" dword="3" bits="13:13" type="bool" />
<field name="Over Dispatch Control" dword="3" bits="15:14" type="uint">
<value name="Over Dispatch None" value="0" />
<value name="Over Dispatch Low" value="1" />
<value name="Over Dispatch Normal" value="2" />
<value name="Over Dispatch High" value="3" />
</field>
<field name="Maximum Number of Threads" dword="3" bits="31:16" type="uint" />
</instruction>
<instruction name="STATE_COMPUTE_MODE" bias="2" length="3" engine="render|compute">
<field name="DWord Length" dword="0" bits="7:0" type="uint" default="1" />
<field name="3D Command Sub Opcode" dword="0" bits="23:16" type="uint" default="5" />
<field name="3D Command Opcode" dword="0" bits="26:24" type="uint" default="1" />
<field name="Command SubType" dword="0" bits="28:27" type="uint" default="0" />
<field name="Command Type" dword="0" bits="31:29" type="uint" default="3" />
<field name="Z Pass Async Compute Thread Limit" dword="1" bits="2:0" type="uint" prefix="ZPACTL">
<value name="Max 60" value="0" />
<value name="Max 64" value="1" />
<value name="Max 56" value="2" />
<value name="Max 48" value="3" />
<value name="Max 40" value="4" />
<value name="Max 32" value="5" />
</field>
<field name="Z Async Throttle settings" dword="1" bits="4:3" type="uint" prefix="ZATS">
<value name="Defer to Async Compute Thread Limit" value="0" />
<value name="Max 32" value="1" />
<value name="Max 40" value="2" />
<value name="Max 48" value="3" />
</field>
<field name="Async Compute Thread Limit" dword="1" bits="9:7" type="uint" prefix="ACTL">
<value name="Disabled" value="0" />
<value name="Max 2" value="1" />
<value name="Max 8" value="2" />
<value name="Max 16" value="3" />
<value name="Max 24" value="4" />
<value name="Max 32" value="5" />
<value name="Max 40" value="6" />
<value name="Max 48" value="7" />
</field>
<field name="Enable Variable Register Size Allocation" dword="1" bits="10:10" type="bool" />
<field name="EU Thread Scheduling Mode Override" dword="1" bits="14:13" type="uint" />
<field name="Large GRF Mode" dword="1" bits="15:15" type="bool" />
<field name="Z Pass Async Compute Thread Limit Mask" dword="1" bits="18:16" type="uint" />
<field name="Mask1" dword="1" bits="31:16" type="uint" />
<field name="Z Async Throttle settings Mask" dword="1" bits="20:19" type="uint" />
<field name="Async Compute Thread Limit Mask" dword="1" bits="25:23" type="uint" />
<field name="Enable Variable Register Size Allocation Mask" dword="1" bits="26:26" type="uint" />
<field name="EU Thread Scheduling Mode Override Mask" dword="1" bits="30:29" type="uint" />
<field name="Large GRF Mode Mask" dword="1" bits="31:31" type="bool" />
<field name="Midthread Preemption Delay Timer" dword="2" bits="2:0" type="uint">
<value name="MTP_TIMER_VAL_0" value="0" />
<value name="MTP_TIMER_VAL_50" value="1" />
<value name="MTP_TIMER_VAL_100" value="2" />
<value name="MTP_TIMER_VAL_150" value="3" />
</field>
<field name="Midthread Preemption Overdispatch Thread group count" dword="2" bits="4:3" type="uint">
<value name="OD_TG_M2" value="0" />
<value name="OD_TG_M4" value="1" />
<value name="OD_TG_M8" value="2" />
<value name="OD_TG_M16" value="3" />
</field>
<field name="Midthread Preemption Overdispatch Test mode" dword="2" bits="5:5" type="uint">
<value name="Regular" value="0" />
<value name="Test mode" value="1" />
</field>
<field name="UAV Coherency Mode" dword="2" bits="6:6" type="uint">
<value name="Drain DataPort Mode" value="0" />
<value name="Flush Dataport L1" value="1" />
</field>
<field name="Midthread Preemption Delay Timer Mask" dword="2" bits="18:16" type="uint" />
<field name="Mask2" dword="2" bits="31:16" type="uint" />
<field name="Midthread Preemption Overdispatch Thread group count Mask" dword="2" bits="20:19" type="uint" />
<field name="Midthread Preemption Overdispatch Test mode Mask" dword="2" bits="21:21" type="uint" />
<field name="UAV Coherency Mode Mask" dword="2" bits="22:22" type="uint" />
<field name="Memory allocation for Scratch and Midthread Preemption buffers Mask" dword="2" bits="27:27" type="uint" />
</instruction>
<register name="CHICKEN_RASTER_2" length="1" num="0x6208">
<field name="Disable Any MCTR response fix" dword="0" bits="5:5" type="bool" />
<field name="Disable Any MCTR response fix Mask" dword="0" bits="21:21" type="bool" />
</register>
</genxml>
src/intel/genxml/xe3_rt.xml
+41
View File
@@ -0,0 +1,41 @@
<?xml version='1.0' encoding='utf-8'?>
<genxml name="RT" gen="30">
<import name="xe2_rt.xml" />
<struct name="BINDLESS_SHADER_RECORD" length="2">
<field name="Offset To Local Arguments" dword="0" bits="2:0" type="uint" />
<field name="Bindless Shader Dispatch Mode" dword="0" bits="4:4" type="uint">
<value name="RT_SIMD16" value="0" />
</field>
<field name="Kernel Start Pointer" dword="0" bits="31:6" type="offset" />
<field name="Registers Per Thread" dword="1" bits="31:28" type="uint" />
</struct>
<struct name="CALL_STACK_HANDLER" length="2">
<field name="Offset To Local Arguments" dword="0" bits="2:0" type="uint" />
<field name="Bindless Shader Dispatch Mode" dword="0" bits="4:4" type="uint">
<value name="RT_SIMD16" value="0" />
</field>
<field name="Kernel Start Pointer" dword="0" bits="31:6" type="offset" />
<field name="Registers Per Thread" dword="1" bits="30:27" type="uint" />
</struct>
<struct name="RT_DISPATCH_GLOBALS" length="21">
<field name="Mem Base Address" dword="0" bits="63:0" type="address" />
<field name="Call Stack Handler" dword="2" bits="63:0" type="CALL_STACK_HANDLER" />
<field name="Async RT Stack Size" dword="4" bits="31:0" type="uint" />
<field name="Num DSS RT Stacks" dword="5" bits="15:0" type="uint" />
<field name="Max BVH Levels" dword="6" bits="2:0" type="uint" />
<field name="Hit Group Stride" dword="6" bits="15:3" type="uint" />
<field name="Miss Group Stride" dword="6" bits="28:16" type="uint" />
<field name="Flags" dword="7" bits="0:0" type="uint">
<value name="RT_DEPTH_TEST_LESS_EQUAL" value="1" />
</field>
<field name="Hit Group Table" dword="8" bits="63:0" type="address" />
<field name="Miss Group Table" dword="10" bits="63:0" type="address" />
<field name="SW Stack Size" dword="12" bits="31:0" type="uint" />
<field name="Launch Width" dword="13" bits="31:0" type="uint" />
<field name="Launch Height" dword="14" bits="31:0" type="uint" />
<field name="Launch Depth" dword="15" bits="31:0" type="uint" />
<field name="Callable Group Table" dword="16" bits="63:0" type="address" />
<field name="Callable Group Stride" dword="18" bits="12:0" type="uint" />
<field name="Resume Shader Table" dword="19" bits="63:0" type="address" />
</struct>
</genxml>
src/intel/genxml/xe3p.xml
+4
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@@ -0,0 +1,4 @@
<?xml version='1.0' encoding='utf-8'?>
<genxml name="XE3P" gen="35">
<import name="xe3.xml" />
</genxml>
src/intel/genxml/xe3p_rt.xml
+4
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@@ -0,0 +1,4 @@
<?xml version='1.0' encoding='utf-8'?>
<genxml name="RT" gen="35">
<import name="xe3_rt.xml" />
</genxml>