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elwrcl committed 2026-06-06 13:25:15 +03:00
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src/nouveau/compiler/latencies/sm100/pred_waw.csv
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waw,disp_alu,disp_dual_alu,coupled,dualalu,r2p,r2ur,fma,fp16,hfma2_mma,redirected_fp64,decoupled,guard
disp_alu,1,1,1,1,1,1+7,1,1,2,2,1 & sb,none
disp_dual_alu,1,1,1,1,1,1+7,1,1,2,2,1 & sb,none
coupled,1,1,1,1,1,1+7,1,1,2,2,1 & sb,none
dualalu,1,1,1,1,1,1+7,1,1,2,2,1 & sb,none
r2p,1,1,1,1,1,1+7,1,1,2,2,1 & sb,none
r2ur,1,1,1,1,1,1,1,1,2,2,1 & sb,none
fma,1,1,1,1,1,1+8,1,1,2,2,1 & sb,none
fp16,2+6,2+6,2+6,2+6,2+6,2+6,2+6,1,2+7,2+7,1 & sb,none
hfma2_mma,2+5,2+5,2+5,2+5,2+5,2+5,2+5,2+5,1,1,1 & sb,none
redirected_fp64,2+5,2+5,2+5,2+5,2+5,2+5,2+5,2+5,1,1,1 & sb,none
decoupled,2+10,2+10,2+10,2+10,2+10,2+10,2+10,2+10,1+12,1+12,1 & sb,none
guard,none,none,none,none,none,none,none,none,none,none,none,none
1 waw disp_alu disp_dual_alu coupled dualalu r2p r2ur fma fp16 hfma2_mma redirected_fp64 decoupled guard
2 disp_alu 1 1 1 1 1 1+7 1 1 2 2 1 & sb none
3 disp_dual_alu 1 1 1 1 1 1+7 1 1 2 2 1 & sb none
4 coupled 1 1 1 1 1 1+7 1 1 2 2 1 & sb none
5 dualalu 1 1 1 1 1 1+7 1 1 2 2 1 & sb none
6 r2p 1 1 1 1 1 1+7 1 1 2 2 1 & sb none
7 r2ur 1 1 1 1 1 1 1 1 2 2 1 & sb none
8 fma 1 1 1 1 1 1+8 1 1 2 2 1 & sb none
9 fp16 2+6 2+6 2+6 2+6 2+6 2+6 2+6 1 2+7 2+7 1 & sb none
10 hfma2_mma 2+5 2+5 2+5 2+5 2+5 2+5 2+5 2+5 1 1 1 & sb none
11 redirected_fp64 2+5 2+5 2+5 2+5 2+5 2+5 2+5 2+5 1 1 1 & sb none
12 decoupled 2+10 2+10 2+10 2+10 2+10 2+10 2+10 2+10 1+12 1+12 1 & sb none
13 guard none none none none none none none none none none none none