mirror of
https://github.com/elwrcl/intel-hard-graphics.git
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dancingmirrors
2e5cca4d05
There was no handling here at all so the GPU would just hang immediately. Assisted-by: Claude
103 lines
3.3 KiB
C
103 lines
3.3 KiB
C
/*
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* Copyright © 2026 [email protected]
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#ifndef ANV_VIDEO_H264_SLICE_H
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#define ANV_VIDEO_H264_SLICE_H
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#include "vulkan/vulkan.h"
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#include "vulkan/util/vk_util.h"
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#include "vk_video/vulkan_video_codec_h264std.h"
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#include "vk_video/vulkan_video_codec_h264std_decode.h"
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#define ANV_H264_MAX_REF_FRAMES 16
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#define ANV_H264_SLICE_P 0
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#define ANV_H264_SLICE_B 1
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#define ANV_H264_SLICE_I 2
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#define ANV_H264_SLICE_SP 3
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#define ANV_H264_SLICE_SI 4
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#define ANV_H264_INVALID_SLOT 0xFF
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struct anv_h264_slice_params {
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int first_mb_in_slice;
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int slice_type;
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int num_ref_idx_l0_active_minus1;
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int num_ref_idx_l1_active_minus1;
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int direct_spatial_mv_pred_flag;
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int cabac_init_idc;
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int slice_qp_delta;
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int disable_deblocking_filter_idc;
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int slice_alpha_c0_offset_div2;
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int slice_beta_offset_div2;
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int luma_log2_weight_denom;
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int chroma_log2_weight_denom;
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uint8_t ref_list0[ANV_H264_MAX_REF_FRAMES];
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uint8_t ref_list1[ANV_H264_MAX_REF_FRAMES];
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uint8_t ref_list0_bottom[ANV_H264_MAX_REF_FRAMES];
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uint8_t ref_list1_bottom[ANV_H264_MAX_REF_FRAMES];
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bool has_weight_offsets_l0;
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bool has_weight_offsets_l1;
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int16_t luma_weight_l0[ANV_H264_MAX_REF_FRAMES];
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int16_t luma_offset_l0[ANV_H264_MAX_REF_FRAMES];
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int16_t chroma_weight_l0[ANV_H264_MAX_REF_FRAMES][2];
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int16_t chroma_offset_l0[ANV_H264_MAX_REF_FRAMES][2];
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int16_t luma_weight_l1[ANV_H264_MAX_REF_FRAMES];
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int16_t luma_offset_l1[ANV_H264_MAX_REF_FRAMES];
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int16_t chroma_weight_l1[ANV_H264_MAX_REF_FRAMES][2];
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int16_t chroma_offset_l1[ANV_H264_MAX_REF_FRAMES][2];
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uint32_t first_mb_byte_offset;
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uint32_t first_mb_bit_offset;
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bool parse_ok;
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};
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struct anv_h264_rbsp {
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const uint8_t *buf;
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const uint8_t *cur;
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const uint8_t *end;
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int bit;
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int zeros;
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bool error;
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int bits_consumed;
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};
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bool
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anv_h264_parse_slice_header(
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const uint8_t *buf,
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uint32_t slice_nalu_offset,
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uint32_t slice_nalu_size,
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const StdVideoH264SequenceParameterSet *sps,
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const StdVideoH264PictureParameterSet *pps,
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const VkVideoDecodeH264PictureInfoKHR *pic_info,
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uint32_t ref_slot_count,
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const VkVideoReferenceSlotInfoKHR *ref_slots,
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struct anv_h264_slice_params *out);
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#endif /* ANV_VIDEO_H264_SLICE_H */
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