mirror of
https://github.com/elwrcl/intel-hard-graphics.git
synced 2026-10-31 10:58:03 +03:00
104 lines
2.8 KiB
YAML
104 lines
2.8 KiB
YAML
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BasedOnStyle: InheritParentConfig
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DisableFormat: false
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AlignConsecutiveBitFields: Consecutive
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ColumnLimit: 80
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BreakStringLiterals: false
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SpaceBeforeParens: ControlStatementsExceptControlMacros
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ForEachMacros: [
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'BITSET_FOREACH_SET',
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'bi_foreach_block',
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'bi_foreach_block_from',
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'bi_foreach_block_from_rev',
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'bi_foreach_block_rev',
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'bi_foreach_clause_in_block',
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'bi_foreach_clause_in_block_from',
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'bi_foreach_clause_in_block_from_rev',
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'bi_foreach_clause_in_block_rev',
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'bi_foreach_clause_in_block_safe',
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'bi_foreach_dest',
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'bi_foreach_instr_and_src_in_tuple',
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'bi_foreach_instr_global',
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'bi_foreach_instr_global_rev',
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'bi_foreach_instr_global_rev_safe',
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'bi_foreach_instr_global_safe',
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'bi_foreach_instr_in_block',
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'bi_foreach_instr_in_block_from',
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'bi_foreach_instr_in_block_from_rev',
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'bi_foreach_instr_in_block_rev',
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'bi_foreach_instr_in_block_safe',
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'bi_foreach_instr_in_block_safe_rev',
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'bi_foreach_instr_in_clause',
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'bi_foreach_instr_in_clause_rev',
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'bi_foreach_instr_in_tuple',
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'bi_foreach_phi_in_block',
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'bi_foreach_phi_in_block_safe',
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'bi_foreach_predecessor',
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'bi_foreach_src',
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'bi_foreach_ssa_dest',
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'bi_foreach_ssa_dest_rev',
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'bi_foreach_ssa_src',
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'bi_foreach_ssa_src_rev',
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'bi_foreach_successor',
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'cs_case',
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'cs_default',
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'cs_else',
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'cs_emit',
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'cs_exception_handler_def',
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'cs_if',
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'cs_iter_sb_update',
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'cs_iter_sb_update_case',
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'cs_match',
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'cs_single_link_list_for_each_from',
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'cs_update_compute_ctx',
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'cs_update_frag_ctx',
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'cs_update_progress_seqno',
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'cs_update_vt_ctx',
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'cs_while',
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'foreach_batch',
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'foreach_list_typed',
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'list_for_each_entry_safe',
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'mir_foreach_block',
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'mir_foreach_block_from',
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'mir_foreach_bundle_in_block',
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'mir_foreach_bundle_in_block_rev',
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'mir_foreach_instr_global',
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'mir_foreach_instr_global_safe',
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'mir_foreach_instr_in_block',
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'mir_foreach_instr_in_block_from',
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'mir_foreach_instr_in_block_from_rev',
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'mir_foreach_instr_in_block_rev',
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'mir_foreach_instr_in_block_safe',
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'mir_foreach_instr_in_block_safe_rev',
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'mir_foreach_instr_in_block_scheduled_rev',
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'mir_foreach_predecessor',
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'mir_foreach_successor',
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'mir_foreach_src',
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'nir_foreach_function_impl',
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'nir_foreach_instr',
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'nir_foreach_phi_src',
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'nir_foreach_use',
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'nir_foreach_variable_with_modes',
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'nir_foreach_shader_in_variable',
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'nodearray_dense_foreach',
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'nodearray_dense_foreach_64',
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'nodearray_sparse_foreach',
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'pan_cast_and_pack',
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'pan_cast_and_pack_nodefaults',
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'pan_pack',
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'pan_pack_nodefaults',
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'pan_section_pack',
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'pan_unpack',
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'panvk_cs_reg_upd_ctx',
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'panvk_priv_mem_readback',
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'panvk_priv_mem_readback_array',
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'panvk_priv_mem_rwm',
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'panvk_priv_mem_rwm_array',
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'panvk_priv_mem_write',
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'panvk_priv_mem_write_array',
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'panvk_priv_mem_write_desc',
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'panvk_shader_foreach_variant',
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'u_foreach_bit',
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]
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