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124 lines
3.3 KiB
C
124 lines
3.3 KiB
C
/*
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* Copyright © 2025 Imagination Technologies Ltd.
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*
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* SPDX-License-Identifier: MIT
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*/
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#ifndef GX6650_H
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#define GX6650_H
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#include <stdbool.h>
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#include "pvr_device_info.h"
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#define PVR_DEVICE_IDENT_4_V_6_62 \
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.device_id = 0x6650, .series_name = "Rogue", \
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.public_name = "GX6650", .arch = PVR_DEVICE_ARCH_ROGUE
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static const struct pvr_device_features pvr_device_features_4_V_6_62 = {
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.has_astc = true,
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.has_cluster_grouping = true,
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.has_common_store_size_in_dwords = true,
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.has_compute = true,
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.has_compute_morton_capable = true,
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.has_compute_overlap = true,
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.has_eight_output_registers = true,
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.has_fbcdc_algorithm = true,
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/* .has_gs_rta_support = true, */
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.has_isp_max_tiles_in_flight = true,
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.has_isp_samples_per_pixel = true,
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.has_max_instances_per_pds_task = true,
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.has_max_multisample = true,
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.has_max_partitions = true,
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.has_max_usc_tasks = true,
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.has_num_clusters = true,
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.has_num_raster_pipes = true,
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.has_pbe_filterable_f16 = true,
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.has_pbe_yuv = true,
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.has_slc_cache_line_size_bits = true,
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.has_slc_mcu_cache_controls = true,
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.has_tf_bicubic_filter = true,
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.has_tile_size_x = true,
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.has_tile_size_y = true,
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.has_tpu_array_textures = true,
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.has_tpu_extended_integer_lookup = true,
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.has_tpu_image_state_v2 = true,
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.has_tpu_parallel_instances = true,
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.has_unified_store_depth = true,
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.has_usc_f16sop_u8 = true,
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.has_usc_itrsmp = true,
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.has_usc_itr_parallel_instances = true,
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.has_usc_min_output_registers_per_pix = true,
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.has_usc_slots = true,
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.has_uvs_banks = true,
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.has_uvs_pba_entries = true,
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.has_uvs_vtx_entries = true,
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.has_vdm_cam_size = true,
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.has_xt_top_infrastructure = true,
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.has_zls_subtile = true,
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.common_store_size_in_dwords = 1280U * 4U * 4U,
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.fbcdc_algorithm = 2U,
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.isp_max_tiles_in_flight = 8U,
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.isp_samples_per_pixel = 2U,
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.max_instances_per_pds_task = 32U,
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.max_multisample = 8U,
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.max_partitions = 8U,
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.max_usc_tasks = 56U,
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.num_clusters = 6U,
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.num_raster_pipes = 2U,
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.slc_cache_line_size_bits = 512U,
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.tile_size_x = 32U,
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.tile_size_y = 32U,
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.tpu_parallel_instances = 4U,
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.unified_store_depth = 256U,
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.usc_itr_parallel_instances = 8U,
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.usc_min_output_registers_per_pix = 2U,
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.usc_slots = 32U,
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.uvs_banks = 8U,
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.uvs_pba_entries = 320U,
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.uvs_vtx_entries = 288U,
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.vdm_cam_size = 256U,
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.has_requires_fb_cdc_zls_setup = true,
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};
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static const struct pvr_device_enhancements pvr_device_enhancements_4_46_6_62 = {
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.has_ern35421 = true,
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.has_ern38020 = true,
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.has_ern38748 = true,
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.has_ern42064 = true,
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.has_ern42307 = true,
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.has_ern45493 = true,
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};
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static const struct pvr_device_quirks pvr_device_quirks_4_46_6_62 = {
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.has_brn44079 = true,
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.has_brn49927 = true,
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.has_brn51025 = true,
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.has_brn51210 = true,
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.has_brn51764 = true,
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.has_brn52354 = true,
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.has_brn52942 = true,
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.has_brn58839 = true,
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.has_brn62269 = true,
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.has_brn66011 = true,
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.has_brn70165 = true,
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.has_brn74056 = true,
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};
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static const struct pvr_device_info pvr_device_info_4_46_6_62 = {
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.ident = {
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PVR_DEVICE_IDENT_4_V_6_62,
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.b = 4,
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.v = 46,
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.n = 6,
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.c = 62,
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},
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.features = pvr_device_features_4_V_6_62,
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.enhancements = pvr_device_enhancements_4_46_6_62,
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.quirks = pvr_device_quirks_4_46_6_62,
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};
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#endif /* GX6650_H */
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