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elwrclandClaude Opus 5
9cb5c4385b
The encoder ignored VkVideoReferenceSlotInfoKHR entirely: it took pReferenceSlots[0] as the one reference, wrote its address into frame store 0 and hardcoded the L0 list to that store. Two DPB slots were all it could honestly advertise, which is fewer than a GOP of any length needs. Record each slot the operation names under its own index, since a slot maps onto the frame store of the same index and MFX_PIPE_BUF_ADDR_STATE holds 16 of those, and build the L0 entries from StdVideoEncodeH264ReferenceListsInfo, whose RefPicList0 already carries slot indices. Clients that pass reference slots without a list keep the old behaviour. maxDpbSlots therefore goes to 16. maxActiveReferencePictures stays at 1: every macroblock is still coded against reference index 0, so a picture may be kept in the DPB but only the one it names first is predicted from. dEQP-VK.video.encode.h264.intra_refresh_* goes from 12 Pass and 32 stopped at the maxDpbSlots >= GOP frame count precondition to 36 Pass, the remaining 8 being per-picture-partition mode, which is not offered. The family as a whole is 76 of 120 with no failures. ffmpeg's h264_vulkan encoder no longer trips its slot_index assertion and produces a full GOP. Co-Authored-By: Claude Opus 5 <[email protected]>
217 lines
9.7 KiB
C
217 lines
9.7 KiB
C
/*
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* Copyright © 2016 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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/*
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* NOTE: The header can be included multiple times, from the same file.
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*/
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/*
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* Gen-specific function declarations. This header must *not* be included
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* directly. Instead, it is included multiple times by anv_private.h.
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*
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* In this header file, the usual genx() macro is available.
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*/
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#ifndef ANV_PRIVATE_H
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#error This file is included by means other than anv_private.h
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#endif
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struct intel_sample_positions;
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extern const uint32_t genX(vk_to_intel_cullmode)[];
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extern const uint32_t genX(vk_to_intel_front_face)[];
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extern const uint32_t genX(vk_to_intel_primitive_type)[];
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extern const uint32_t genX(vk_to_intel_compare_op)[];
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extern const uint32_t genX(vk_to_intel_stencil_op)[];
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extern const uint32_t genX(vk_to_intel_logic_op)[];
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void genX(init_physical_device_state)(struct anv_physical_device *device);
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VkResult genX(init_device_state)(struct anv_device *device);
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void genX(cmd_buffer_emit_state_base_address)(struct anv_cmd_buffer *cmd_buffer);
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void genX(cmd_buffer_apply_pipe_flushes)(struct anv_cmd_buffer *cmd_buffer);
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void genX(cmd_buffer_emit_gfx7_depth_flush)(struct anv_cmd_buffer *cmd_buffer);
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void genX(cmd_buffer_set_binding_for_gfx8_vb_flush)(struct anv_cmd_buffer *cmd_buffer,
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int vb_index,
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struct anv_address vb_address,
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uint32_t vb_size);
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void genX(cmd_buffer_update_dirty_vbs_for_gfx8_vb_flush)(struct anv_cmd_buffer *cmd_buffer,
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uint32_t access_type,
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uint64_t vb_used);
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void genX(flush_pipeline_select_3d)(struct anv_cmd_buffer *cmd_buffer);
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void genX(flush_pipeline_select_media)(struct anv_cmd_buffer *cmd_buffer);
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void genX(flush_pipeline_select_gpgpu)(struct anv_cmd_buffer *cmd_buffer);
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/* Emits the MFC/MFX static state and per-MB PAK objects for one H.264 encode.
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* Defined in anv_video_mfc.c (a separate TU due to the genX_pack.h /
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* genX_video_pack.h include-guard collision; see that file's header). */
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/* Emits the frame-level MFC/MFX static state (everything up to but not
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* including the slices). Call once per frame, before emitting any slice. */
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void genX(hasvk_mfc_emit_static_state)(struct anv_cmd_buffer *cmd_buffer,
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const struct anv_image *source_image,
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struct anv_address recon_address,
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const StdVideoH264SequenceParameterSet *sps,
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const StdVideoH264PictureParameterSet *pps,
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struct anv_address dst_address,
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uint32_t dst_page_offset,
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uint64_t dst_buffer_range,
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uint32_t width_in_mbs, uint32_t height_in_mbs,
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bool is_p,
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const struct anv_video_reference_state *refs);
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/* Emits one slice: MFX_AVC_SLICE_STATE, the slice-header insert, the per-MB
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* PAK objects for the macroblock range [slice_start_mb, slice_end_mb), and the
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* slice tail. Call once per slice, after the frame-level static state. Intra
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* neighbour availability is computed relative to slice_start_mb so it matches
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* the decoder (intra prediction does not cross slice boundaries). */
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void genX(hasvk_mfc_emit_slice)(struct anv_cmd_buffer *cmd_buffer,
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const StdVideoH264SequenceParameterSet *sps,
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const StdVideoH264PictureParameterSet *pps,
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const StdVideoEncodeH264PictureInfo *pic_info,
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const StdVideoEncodeH264SliceHeader *slice_hdr,
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uint32_t slice_start_mb, uint32_t slice_end_mb,
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uint32_t width_in_mbs, uint32_t height_in_mbs,
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uint32_t qp, bool is_last_slice,
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uint32_t dst_page_offset,
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const struct anv_video_intra_refresh *intra_refresh);
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enum anv_pipe_bits
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genX(emit_apply_pipe_flushes)(struct anv_batch *batch,
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struct anv_device *device,
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uint32_t current_pipeline,
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enum anv_pipe_bits bits);
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void genX(emit_so_memcpy_init)(struct anv_memcpy_state *state,
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struct anv_device *device,
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struct anv_batch *batch);
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void genX(emit_so_memcpy_fini)(struct anv_memcpy_state *state);
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void genX(emit_so_memcpy)(struct anv_memcpy_state *state,
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struct anv_address dst, struct anv_address src,
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uint32_t size);
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void genX(emit_l3_config)(struct anv_batch *batch,
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const struct anv_device *device,
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const struct intel_l3_config *cfg);
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void genX(cmd_buffer_config_l3)(struct anv_cmd_buffer *cmd_buffer,
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const struct intel_l3_config *cfg);
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void genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer);
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void genX(cmd_buffer_enable_pma_fix)(struct anv_cmd_buffer *cmd_buffer,
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bool enable);
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void genX(cmd_buffer_mark_image_written)(struct anv_cmd_buffer *cmd_buffer,
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const struct anv_image *image,
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VkImageAspectFlagBits aspect,
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enum isl_aux_usage aux_usage,
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uint32_t level,
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uint32_t base_layer,
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uint32_t layer_count);
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void genX(cmd_emit_conditional_render_predicate)(struct anv_cmd_buffer *cmd_buffer);
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void
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genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch,
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const struct intel_l3_config *l3_config,
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VkShaderStageFlags active_stages,
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const unsigned entry_size[4]);
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void
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genX(emit_vertex_input)(struct anv_graphics_pipeline *pipeline,
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struct anv_batch *batch,
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const struct vk_vertex_input_state *vi);
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void genX(emit_multisample)(struct anv_batch *batch, uint32_t samples,
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const struct vk_sample_locations_state *sl);
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void genX(emit_sample_pattern)(struct anv_batch *batch,
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const struct vk_sample_locations_state *sl);
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void genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer,
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struct anv_address dst, struct anv_address src,
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uint32_t size);
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void genX(blorp_exec)(struct blorp_batch *batch,
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const struct blorp_params *params);
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void genX(cmd_emit_timestamp)(struct anv_batch *batch,
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struct anv_device *device,
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struct anv_address addr,
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enum anv_timestamp_capture_type);
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void genX(cmd_capture_data)(struct anv_batch *batch,
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struct anv_device *device,
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struct anv_address dst_addr,
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struct anv_address src_addr,
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uint32_t size_B);
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void
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genX(rasterization_mode)(VkPolygonMode raster_mode,
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VkLineRasterizationModeEXT line_mode,
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float line_width,
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uint32_t *api_mode,
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bool *msaa_rasterization_enable);
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uint32_t
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genX(ms_rasterization_mode)(struct anv_graphics_pipeline *pipeline,
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VkPolygonMode raster_mode);
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VkPolygonMode
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genX(raster_polygon_mode)(struct anv_graphics_pipeline *pipeline,
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VkPrimitiveTopology primitive_topology);
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void
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genX(graphics_pipeline_emit)(struct anv_graphics_pipeline *pipeline,
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const struct vk_graphics_pipeline_state *state);
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void
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genX(compute_pipeline_emit)(struct anv_compute_pipeline *pipeline);
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void
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genX(emit_query_mi_flush_availability)(struct anv_cmd_buffer *cmd_buffer,
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struct anv_address addr,
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bool available);
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void
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genX(emit_query_mi_write_u64)(struct anv_cmd_buffer *cmd_buffer,
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struct anv_address addr,
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uint64_t value);
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void
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genX(emit_query_mi_write_reg32)(struct anv_cmd_buffer *cmd_buffer,
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struct anv_address addr,
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uint32_t reg);
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