intel-hard/intel-hard-graphics
2
0 Fork 0
mirror of https://github.com/elwrcl/intel-hard-graphics.git synced 2026-10-31 02:48:03 +03:00
Code Issues Packages Projects Releases Wiki Activity

hasvk: Drop the video queue paths for CmdSetEvent2 and CmdResetEvent2.

Browse Source 
Assisted-by: Claude
This commit is contained in:
dancingmirrors authored and elwrcl committed 2026-07-21 22:08:58 +03:00
1 parent 878d7c9717
commit ed56facc56
1 file changed
-24
Download Patch File Download Diff File Expand all files Collapse all files
src/intel/vulkan_hasvk/genX_cmd_buffer.c
-24
View File
@@ -5906,18 +5906,6 @@ void genX(CmdSetEvent2)(
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
ANV_FROM_HANDLE(anv_event, event, _event);
if (is_video_queue_cmd_buffer(cmd_buffer)) {
anv_batch_emit(&cmd_buffer->batch, GENX(MI_FLUSH_DW), flush) {
flush.PostSyncOperation = WriteImmediateData;
flush.Address = (struct anv_address) {
cmd_buffer->device->dynamic_state_pool.block_pool.bo,
event->state.offset
};
flush.ImmediateData = VK_EVENT_SET;
}
return;
}
VkPipelineStageFlags2 src_stages =
vk_collect_dependency_info_src_stages(pDependencyInfo);
@@ -5949,18 +5937,6 @@ void genX(CmdResetEvent2)(
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
ANV_FROM_HANDLE(anv_event, event, _event);
if (is_video_queue_cmd_buffer(cmd_buffer)) {
anv_batch_emit(&cmd_buffer->batch, GENX(MI_FLUSH_DW), flush) {
flush.PostSyncOperation = WriteImmediateData;
flush.Address = (struct anv_address) {
cmd_buffer->device->dynamic_state_pool.block_pool.bo,
event->state.offset
};
flush.ImmediateData = VK_EVENT_RESET;
}
return;
}
cmd_buffer->state.pending_pipe_bits |= ANV_PIPE_POST_SYNC_BIT;
genX(cmd_buffer_apply_pipe_flushes)(cmd_buffer);