Commit Graph
84 Commits
Author SHA1 Message Date
elwrclandClaude Opus 5 e013642d5c nine: Gallium Nine'i Mesa 26.x'e forward-port et
Nine Mesa 25.2'de silindi. Bu commit onu 26.2 agacina geri getiriyor:
src/gallium/frontends/nine, src/gallium/targets/d3dadapter9, D3D9 ve
d3dadapter basliklari, meson entegrasyonu ve driconf secenekleri.

Silinmesinden sonra gallium'da degisen ve uyum gerektiren yerler:
  - mesa_shader_stage, enum pipe_shader_type'in yerini aldi
  - pipe_surface de-pointerize edildi, create_surface kalkti
  - u_upload_data/alloc artik referans vermiyor; _ref varyantlarina gecildi
  - threaded_context kullanici sabit tamponlarini yuklemiyor (MR 36715),
    tc_set_constant_buffer'da assert(!cb->user_buffer) var. SWVP ve
    fixed-function yollari icin nine_upload_constant_buffer() eklendi.
  - driParseConfigFiles struct API'sine gecti

Ayrica D3D9'un ugradigi ama GL frontend'inin hic gecmedigi uc yolda
surucu hatasi cikti; ucu de burada:

  crocus_query.c   PIPE_QUERY_GPU_FINISHED ele alinmiyordu
  crocus_clear.c   clear_render_target gelen pipe_surface'i crocus_surface'e
                   cast edip ->view okuyordu; Nine kendi surface'ini
                   uretiyor, format crocus_format_for_usage ile yeniden
                   turetiliyor
  tgsi_to_nir.c    TXD'de ddx/ddy bilesen sayisi kirpilmiyordu

Gercek donanimda dogrulandi (8086:0166, crocus, wine 11.0 +
wine-nine-standalone): Max Payne 2, The Witcher EE, Fallout New Vegas,
Warband, L4D1, PAYDAY: The Heist calisiyor.

Co-Authored-By: Claude Opus 5 <[email protected]>
2026-09-21 22:57:20 +03:00
elwrclandClaude Opus 5 e004b50acd crocus: batch pinlemesini opsiyonel yap, gonderim hatasini susturma
recreate_growing_buffer() batch tamponlarina statik, monoton artan bir GTT
adresi verip EXEC_OBJECT_PINNED ile sabitliyordu (7e82b85). Amac
EXEC_OBJECT_CAPTURE ile birlikte GPU hata dokumlerinde adreslerin sabit
kalmasiydi, ama adres asla geri donusturulmuyordu.

create_batch() her flush'ta iki tampon yaratiyor (command ~20K + state
16K), yani her flush ~36K adres alani yakiyor. IVB'nin PPGTT'si 2 GB;
0x20000000'den baslayinca ~43 bin flush sonra alan bitiyor ve execbuf
ENOSPC donuyor. 60 fps'te birkac dakika: Witcher EE ve Fallout NV'de
oynanisin ortasinda tekrarlanabilir cokme.

Varsayilan artik upstream davranisi (adresi cekirdek secer).
CROCUS_PIN_BATCH=1 ile eski davranis geri gelir.

Ayrica: gonderim hatasi mesaji upstream'de MESA_DEBUG arkasinda. Release
derlemesinde hata tek satir aciklama birakmadan abort() olarak goruluyor
ve teshis edilemiyordu -- yukaridaki ENOSPC'yi bulmak bu yuzden zor oldu.
abort() zaten olumcul; sebebi artik her zaman yaziliyor.

crocus_context.c'deki gecici fprintf teshisi de kaldirildi.

Co-Authored-By: Claude Opus 5 <[email protected]>
2026-09-21 22:56:29 +03:00
elwrclandClaude Opus 5 6000949371 hasvk: gen7'de fp64/int64/int16 ve 16-bit storage'i ac
Bu dort ozellik pdevice->info.ver >= 8 ile kapatilmisti. Kapi anv'den
miras; Ivy Bridge'den turetilmemis. IVB PRM ve elk'in kendi register
tablolari aksini soyluyor:

  fp64   -> gfx7_hw_type[] icinde DF var        : native
  int16  -> W / UW var                          : native
  int64  -> Q / UQ yok (gen8+)                  : nir_lower_int64 ile
  fp16   -> HF yok                              : gercekten yok, false kalir

16-bit bellek erisimi icin gereken indirgeme zaten kuruluydu:
elk_nir.c:get_mem_access_size_align() verx10 < 75 icin her sub-dword
erisimi 32-bit dword'e ceviriyor (load'da shift+extract, store'da atomic
RMW). f16<->f32 donusum komutlari da IVB'de mevcut.

VK-GL-CTS ile olculdu (8086:0166, IVB GT2):
  fp64  : 9402 vaka -> 3975 Pass, 20 Fail (hepsi float_controls kenar
          durumu: vertex'te dot/normalize ve rounding_rtz_round_ev)
  int64 : spirv_assembly.type.{scalar,vec2} -> 160 Pass, 0 Fail
          (vertex varyantlari vertexPipelineStoresAndAtomics'ten atliyor)
  16-bit: daha once 948/948 atlanan set -> 500 Pass, 0 Fail

int16 CTS ile tek basina sinanamiyor (her 16-bit vakasi ayrica
uniformAndStorageBuffer16BitAccess istiyor), dayanak register tablosu.

fp64 float-controls ozellikleri true birakildi; gen7'de calismalarinin
sarti olan vec4 FLOAT_CONTROL_MODE emisyonu ayri commit'te eklendi.

Co-Authored-By: Claude Opus 5 <[email protected]>
2026-09-21 22:56:09 +03:00
elwrclandClaude Opus 5 64632dfceb elk: bit-boyutu indirgemesine UBO modunu ekle
nir_lower_mem_access_bit_sizes()'in mod listesinde nir_var_mem_ubo yoktu.
Modern brw (brw_nir.c) onu iceriyor; elk'te unutulmus. Sonucu: gen7'de
16-bit UBO erisimleri hic indirgenmiyor ve sessizce yanlis sonuc
veriyordu -- get_mem_access_size_align() verx10 < 75 icin her sub-dword
erisimi 32-bit dword'e cevirip load'da shift+extract, store'da atomic RMW
uretiyor, ama pass UBO yuklerine hic ugramiyordu.

storageBuffer16BitAccess acilana kadar ulasilamaz bir yoldu, o yuzden
fark edilmemis.

VK-GL-CTS, 8086:0166, spirv_assembly 16-bit seti (15368 vaka):
  16bit_storage.uniform_16_to_32 / _chainaccess / _to_64 -> 72 Fail
  duzeltmeden sonra 72'sinin tamami Pass.

Co-Authored-By: Claude Opus 5 <[email protected]>
2026-09-21 22:55:53 +03:00
elwrclandClaude Opus 5 9fbac1ee73 elk: vec4 arka ucunda fp64 float-controls emisyonunu tamamla
vec4_visitor::emit_shader_float_controls_execution_mode() yalnizca
ELK_SHADER_OPCODE_RND_MODE emit ediyordu; denorm modunu hic yazmiyordu.
SIMD arka ucu ikisini birden ELK_SHADER_OPCODE_FLOAT_CONTROL_MODE ile
yaziyor. Gen7'de VS/GS/TCS/TES vec4 kullandigi icin bu asamalarda fp64
denorm semantigi sessizce yanlisti.

Donanim yapabiliyor -- IVB PRM vol4 part3, CR0 bit 6 "Double Precision
Denorm Mode" ve bit 5:4 "Rounding Mode", elk'in ELK_CR0_* sabitleriyle
birebir ortusuyor. Eksik olan yalnizca emisyondu; elk_vec4_generator.cpp
da o opcode'u hic ele almiyordu.

elk_rnd_mode_from_nir() elk_fs_nir.cpp'den elk_nir.c'ye tasindi, iki arka
uc paylasiyor.

VK-GL-CTS, 8086:0166 (IVB GT2), 9402 fp64 vakasi:
  oncesi: 3943 Pass / 52 Fail
  sonrasi: 3975 Pass / 20 Fail
Gerileme yok: draw/vertex_input/tess/geom diliminde dusen 166 vaka
degisiklik geri alinarak tekrar kosuldu, hepsi ayni sekilde dusuyor.

Co-Authored-By: Claude Opus 5 <[email protected]>
2026-09-21 22:55:40 +03:00
elwrcl 785e5e4fa4 ignore 2026-08-24 01:19:12 +03:00
elwrcl 7acab34fe8 Reapply "hasvk: Encode B pictures on gen7."
This reverts commit 26405fe38c.
2026-08-23 03:06:02 +03:00
elwrcl 26405fe38c Revert "hasvk: Encode B pictures on gen7."
This reverts commit 81cf1c16db.

The B frame work was never verified beyond its own four tests: every attempt
to run the whole encode family since has aborted on a device loss.  The
bisect that seemed to clear it was worthless, because only the first run
after a reboot was on a healthy GPU and every later measurement was taken on
a ring that had already hung.

Going back to the last commit with a completed run behind it: 120 of 120
executed, 92 passing, none failing.  B pictures can come back once they can
be verified one change at a time, on a machine with no other GPU client to
lose.
2026-08-21 18:06:06 +03:00
elwrclandClaude Opus 5 81cf1c16db hasvk: Encode B pictures on gen7.
The encoder refused B pictures outright.  Three things were missing.

The slice header writer marked every picture as a reference, nal_ref_idc
hardcoded to 1.  A B picture nothing will reference has to say so, otherwise
a decoder keeps it in the DPB and its frame_num accounting drifts until the
DPB overflows; the client's is_reference flag decides now, an IDR aside.

The same writer emitted no B slice syntax at all, so direct_spatial_mv_pred_flag
and the L1 reference list modification flag were absent and the bitstream went
out of sync from that bit onwards.  Spatial direct mode is chosen, which
derives motion from neighbours rather than the co-located picture, so no
direct MV buffer has to be read back.

Finally the L1 reference list was never built.  It comes from RefPicList1 the
same way L0 comes from RefPicList0, and feeds MFX_AVC_REF_IDX_STATE list 1
and the L1 count in MFX_AVC_IMG_STATE.

Prediction itself is unchanged: a B macroblock is coded as B_L0_16x16, so it
predicts from L0 alone and costs about what a P macroblock costs.  What a B
picture buys here is that it need not enter the DPB, not a cheaper prediction.
Bi-prediction would need the macroblock type raised to B_Bi_16x16 and motion
vectors for both lists.

dEQP-VK.video.encode.h264.i_p_b_13_* goes from NotSupported to 4/4 Pass.

NOT FULLY VERIFIED: the run over the whole encode family aborted partway on an
unrelated device loss, with two QualityWarnings in intra_refresh that were not
there before, so this needs re-running on a healthy GPU before being trusted.

Co-Authored-By: Claude Opus 5 <[email protected]>
2026-08-21 08:39:21 +03:00
elwrclandClaude Opus 5 f68161c313 hasvk: Add open-loop CBR and VBR rate control for gen7.
Only constant QP was offered.  Add the two bitrate modes, with the quantizer
derived once per picture from the requested bitrate and frame rate.

There is no closed loop and there cannot be one here: a picture's size is
known only after the GPU encodes it, and vkCmdEncodeVideoKHR merely records
commands.  The VA-API encoder for this hardware runs its bit rate control
after each frame completes, which that API's synchronisation allows and this
one does not, and gen7 has no macroblock-level rate control the hardware
drives on its own -- the VA-API driver leaves those MFX_AVC_IMG_STATE fields
zero on this generation.  Vulkan defines rate control as best effort, and
this is the effort.

The quantizer comes from a measured curve rather than a guess: sweeping QP 14
to 50 over a 176x144 clip gives 361 bits per macroblock at QP 26 for an I
picture and 166 for a P one, halving every 12.5 steps of the quantizer for I
and every 10.3 for P.  Measured against the target across a 15x range of
bitrates, I pictures land between 0.82x and 1.30x, P pictures between 0.59x
and 1.56x -- the spread on P is content dependent and nothing open loop can
narrow it.  A target below about 90 bits per macroblock cannot be met at all,
since that is where the curve flattens.

dEQP-VK.video.encode.h264 goes from 84 to 92 of 120 with no failures.  The
remaining 28 are quantization maps, which gen7 has no hardware path for, and
B frames.

Co-Authored-By: Claude Opus 5 <[email protected]>
2026-08-21 08:21:15 +03:00
elwrclandClaude Opus 5 e7142772a7 hasvk: Partition the picture across slices instead of reading first_mb_in_slice.
Splitting a picture into slices is the implementation's job.  The encoder
instead read first_mb_in_slice out of each entry's slice header and used the
next entry's value as the end of the range, but clients leave that field at
zero on every entry and expect the driver to derive it and write it into the
emitted header.  A multi-slice picture therefore came out as one slice
covering nothing, and vkCmdEncodeVideoKHR failed.

Divide the macroblock rows evenly across the NALU slice entries, which keeps
every slice row-aligned as required while
VK_VIDEO_ENCODE_H264_CAPABILITY_ROW_UNALIGNED_SLICE_BIT_KHR is not
advertised, and reject more slices than there are rows.

This also removes the workaround for ffmpeg passing first_mb_in_slice=1,
which was not a client bug at all: the field was never an input.

Per-picture-partition intra refresh needs nothing beyond this, since the
refreshed partition is just a slice the client marks as an I slice and slices
are already coded by their own slice_type, so offer that mode too.

dEQP-VK.video.encode.h264 goes from 76 to 84 of 120.  The remaining 36 are
honest: quantization maps have no hardware path on gen7, where the only
per-macroblock QP is the one the CPU writes into the PAK object and the only
indirect data a PAK object fetches is motion vectors; B frames and rate
control are not implemented.

Co-Authored-By: Claude Opus 5 <[email protected]>
2026-08-21 08:06:31 +03:00
elwrclandClaude Opus 5 9cb5c4385b hasvk: Track DPB slots instead of assuming a single reference.
The encoder ignored VkVideoReferenceSlotInfoKHR entirely: it took
pReferenceSlots[0] as the one reference, wrote its address into frame store 0
and hardcoded the L0 list to that store.  Two DPB slots were all it could
honestly advertise, which is fewer than a GOP of any length needs.

Record each slot the operation names under its own index, since a slot maps
onto the frame store of the same index and MFX_PIPE_BUF_ADDR_STATE holds 16
of those, and build the L0 entries from StdVideoEncodeH264ReferenceListsInfo,
whose RefPicList0 already carries slot indices.  Clients that pass reference
slots without a list keep the old behaviour.

maxDpbSlots therefore goes to 16.  maxActiveReferencePictures stays at 1:
every macroblock is still coded against reference index 0, so a picture may
be kept in the DPB but only the one it names first is predicted from.

dEQP-VK.video.encode.h264.intra_refresh_* goes from 12 Pass and 32 stopped at
the maxDpbSlots >= GOP frame count precondition to 36 Pass, the remaining 8
being per-picture-partition mode, which is not offered.  The family as a whole
is 76 of 120 with no failures.  ffmpeg's h264_vulkan encoder no longer trips
its slot_index assertion and produces a full GOP.

Co-Authored-By: Claude Opus 5 <[email protected]>
2026-08-21 07:55:40 +03:00
elwrclandClaude Opus 5 0716678e70 hasvk: Add VK_KHR_video_encode_intra_refresh for gen7.
Each macroblock's intra/inter decision is already made on its own when the
PAK objects are emitted, so refreshing a region is a matter of coding the
macroblocks it covers the way an I slice codes them.  Regions divide the
picture evenly along rows, columns or raster order, which leaves the block,
block-row and block-column modes supported and gives empty regions for free
when the cycle is longer than the split axis.

Two things needed care.  PAK keeps the I slice numbering for MbType5Bits
inside a P slice, where H.264 itself offsets intra mb_types by 5; handing it
the offset value hangs the MFC.  And under constrained intra prediction a
neighbour only counts as available if it is in the refresh region too,
because prediction may not cross into an inter macroblock.

Nothing constrains motion away from not-yet-refreshed regions, which is
sound only because there is no motion estimation: every vector is zero, so a
macroblock reads its own co-located block and never leaves its region.
Motion estimation will have to honour VkVideoReferenceIntraRefreshInfoKHR's
dirty region count.

Per-picture-partition mode is not offered.  It wants the refreshed slice
coded as an I slice, header included, rather than as intra macroblocks
inside a P slice.

dEQP-VK.video.encode.h264.intra_refresh_* goes from 44 NotSupported to 12
Pass; all three modes pass in the variants that can run.  The other 32 stop
at a CTS precondition, maxDpbSlots >= GOP frame count, which the driver's
two slots do not meet.  Raising that needs real DPB slot tracking and is
what gates B frames and ffmpeg's encoder too.

Co-Authored-By: Claude Opus 5 <[email protected]>
2026-08-21 07:35:13 +03:00
elwrclandClaude Opus 5 113661753e hasvk: Report result status query support on the video queues.
The queue family properties claimed no support with the note that the VCS
"seemingly cannot do a posted memory write".  It can: the encode feedback
query already writes its availability, buffer offset and byte count from a
video queue through exactly the same MI_FLUSH_DW post-sync write, and the
VK_QUERY_TYPE_RESULT_STATUS_ONLY_KHR paths in genX_query.c are complete.
Only the advertised capability was missing.

dEQP-VK.video.encode.h264.query_with_status_* goes from NotSupported, where
it failed device creation, to 4/4 Pass; the family is now 40 of 120 with no
failures.  h264 decode is unaffected.

Co-Authored-By: Claude Opus 5 <[email protected]>
2026-08-21 07:13:27 +03:00
elwrclandClaude Opus 5 a3e191c354 hasvk: Support VK_KHR_unified_image_layouts.
VK_IMAGE_LAYOUT_GENERAL already lands on the conservative aux choice for
every usage, since anv_layout_to_aux_state() derives that from the layout's
usage flags and GENERAL reports all of them, and video images carry no aux
at all.  So the layout itself needed no work; what the extension does add is
a requirement that the host image copy layout lists name every layout it
declares interchangeable with GENERAL.

Those layouts can only be offered if a host copy is safe in each of them,
and the CPU cannot resolve an aux surface on its way to the image.  Create
images that carry VK_IMAGE_USAGE_HOST_TRANSFER_BIT without one, which makes
every layout equivalent for them and vkTransitionImageLayoutEXT a genuine
no-op rather than one justified by only ever offering GENERAL.

dEQP-VK.video.encode.h264 goes from 18 to 36 passes out of 120, still with
no failures: the general_layout variants were the whole gap.
dEQP-VK.image.host_image_copy goes from 2037 passes and one failure to
19140 passes and none, the failure having been the properties test checking
exactly this list.

Co-Authored-By: Claude Opus 5 <[email protected]>
2026-08-21 07:06:57 +03:00
elwrclandClaude Opus 5 4caedfb57d hasvk: Honour inline video encode feedback queries.
VK_KHR_video_maintenance1 lets a client chain VkVideoInlineQueryInfoKHR onto
vkCmdEncodeVideoKHR instead of bracketing it with vkCmdBeginQuery and
vkCmdEndQuery.  The driver advertises the feature but only ever wrote the
feedback result to the address vkCmdBeginQuery had recorded, so with an
inline query nothing wrote the result or marked it available and the client
waited on a query that never became ready.

Derive the address from the chained pool when one is present.

dEQP-VK.video.encode.h264.inline_query_* went from DEVICE_LOST, which also
aborted the rest of the run, to Pass.  With this and the missing 352x288
input clip generated, the whole h264 encode family now runs clean: 18 pass,
0 fail out of 120, no aborts.

Co-Authored-By: Claude Opus 5 <[email protected]>
2026-08-21 06:49:00 +03:00
elwrclandClaude Opus 5 30cbb40eb0 hasvk: Emit the inter quantizer matrices and code P residuals on gen7.
MFX_QM_STATE and MFX_FQM_STATE hold separate register sets for the intra
and the inter scaling lists, but only the intra ones were programmed.  The
hardware therefore quantized every inter residual with whatever those
registers happened to hold, so a coded P macroblock came back corrupted
while I frames were correct.  That is why the P path shipped as skip-only.

With both sets programmed, P macroblocks can carry a real residual: encode
them as coded BP_L0_16x16 with a zero motion vector instead of forcing
P_Skip.  A P frame now tracks changing content rather than repeating its
reference.

Measured on a 176x144 clip at QP 26, P frame luma PSNR against the true
source: 12.81 dB before, 43.87 dB after (the I frame scores 44.53 dB), at
2062 bytes versus the I frame's 4474.  With an unchanged source the P frame
costs 67 bytes, down from 4862.

dEQP-VK.video.encode.h264.* goes from 12 to 14 passes with no new failures.
There is still no motion estimation, so a moving block costs a full residual
rather than a motion vector.

Co-Authored-By: Claude Opus 5 <[email protected]>
2026-08-21 06:43:57 +03:00
elwrcl 4cd710a261 hasvk: Skip zero-sized compute dispatches on gen7.
GPGPU_WALKER has no encoding for a zero group count, so passing one
through walks the full dimension and the command never retires, hanging
rcs0 (GPU HANG ecode 7:1:8ff8ffff, EIR and PGTBL_ER both clear).  A zero
dispatch is legal and defined as a no-op, so drop it at record time.
through walks the full dimension and the command never retires, hanging
rcs0 (GPU HANG ecode 7:1:8ff8ffff, EIR and PGTBL_ER both clear).  A zero
dispatch is legal and defined as a no-op, so drop it at record time.

Gen9+ uses COMPUTE_WALKER and handles this in hardware, which is why
upstream anv carries no equivalent guard.

Fixes dEQP-VK.compute.pipeline.basic.empty_workgroup_{all,x,y,z} and
empty_shader, which previously aborted the run and could take the whole
machine down.  compute.pipeline.* now 20285 cases, 0 fail.
2026-08-20 21:54:03 +03:00
elwrclandClaude Opus 5 636d2c2f70 hasvk: Add host_image_copy, H.264 encode and a batch of gen7 fixes.
Squashed work that had been sitting in the working tree. Grouped by area:

Extensions
  VK_EXT_host_image_copy, with a MEMCPY_BIT path that reads and writes the
  image's own tiled layout, VkSubresourceHostMemcpySizeEXT filled in, and
  VkHostImageCopyDevicePerformanceQueryEXT answered.  Depth/stencil and
  non-power-of-two bpb stay NotSupported.
  VK_EXT_pipeline_robustness, VK_KHR_shader_float_controls2,
  VK_KHR_shader_subgroup_rotate, VK_EXT_vertex_input_dynamic_state,
  VK_EXT_conditional_rendering (an MI_PREDICATE path for gen7, which has no
  GPRs), custom_border_color, border_color_swizzle, map_memory2,
  load_store_op_none, depth_clamp_zero_one,
  dynamic_rendering_unused_attachments, index_type_uint8,
  line_rasterization, vertex_attribute_divisor, mutable_descriptor_type.

H.264 encode
  MFC command emission and a bitstream writer, driving intra-only encode
  through the video queue.  Video profile reporting was also corrected from
  270 combinations down to the 11 that actually exist.

Correctness
  gfx7 routes typed surface writes through the render cache, so
  VK_ACCESS_SHADER_WRITE barriers have to flush it -- without that, nothing a
  fragment shader stored was visible.
  nir_opt_algebraic's fadd->flrp fusion rules dropped signed zero; '~' only
  excludes nir_fp_exact, not preserve_signed_zero, so reflect() with a -0
  input came out wrong.  Guarded with (nsz).
  Stop advertising STORAGE_READ_WITHOUT_FORMAT: shaderStorageImageReadWithout-
  Format is false here, and since Vulkan 1.3 the per-format bit is what grants
  permission, so reporting it while rejecting the pipeline is a contradiction.
  gfx7's typed data port ignores SURFTYPE_NULL -- the null surface still has
  one addressable texel, which read and wrote graphics address zero.  Bounds
  check typed image access against the image param when nullDescriptor is
  enabled, the same trick lower_image_atomic_instr already used on IVB.
  Formats that require a sampler Y'CbCr conversion no longer report
  BLIT_SRC/BLIT_DST/STORAGE_IMAGE.  Video decode does not need them.
  Check the surface state allocations in emit_binding_table() and in the push
  descriptor path instead of writing through a NULL map in release builds.

Co-Authored-By: Claude Opus 5 <[email protected]>
2026-08-09 00:32:40 +03:00
elwrcl 0e4983ca15 Add a .gitignore for build trees and local scratch.
The tree has no .gitignore at all, so build/, .cache/clangd, __pycache__,
the CTS/vkoverhead/vkmark checkouts and assorted test media had all found
their way into the index.
2026-08-09 00:31:56 +03:00
dancingmirrors cd91e8f22f hasvk: Remove now unreachable layered clamping. 2026-07-21 22:25:28 +03:00
dancingmirrors 409568b8d4 hasvk: We can use ARYSPC_LOD0 for layered DPB. 2026-07-21 22:25:28 +03:00
dancingmirrors 49447ce96e hasvk: Expose HASVK_DEBUG=video-debug and clean it up. 2026-07-21 22:25:28 +03:00
dancingmirrors c9dcef66aa hasvk: Emit MFX_AVC_WEIGHTOFFSET_STATE for both list 0 and list 1.
Fixes Haswell corruption with https://files.lynne.ee/testsamples/bbc2.sample.h264.
This is the correct thing to do anyway and only worked on Ivy Bridge by accident.

Assisted-by: Claude
2026-07-21 22:25:27 +03:00
dancingmirrors 1d4d7c0650 hasvk: Haswell doesn't have the same DMV buffer as earlier generations. 2026-07-21 22:25:27 +03:00
dancingmirrors 564cead081 hasvk: Without a QPitch override gen7 can't reliably handle layered DPB.
Just accept corruption and avoid intermittent hangs when not tile aligned.
Breaks: dEQP-VK.video.decode.h264.interleaved_layered_dpb_video_layout

Assisted-by: Claude
2026-07-21 22:25:27 +03:00
dancingmirrors 4204b5ff5b hasvk: Initial layered DPB support and plenty of debug output.
Assisted-by: Claude
2026-07-21 22:25:27 +03:00
dancingmirrors 72177c94e1 hasvk: Fix the length in MFX_AVC_SLICE_STATE. 2026-07-21 22:25:26 +03:00
dancingmirrors 083ee5051c hasvk: Properly handle complementary field pairs.
The else branch here was also unreachable.
Fixes the poisoned first field in https://files.lynne.ee/testsamples/bbc2.sample.h264.

Assisted-by: Claude
2026-07-21 22:25:26 +03:00
dancingmirrors 22ce819de6 hasvk: Account for unsupported shaderStorageImageReadWithoutFormat.
When mpv creates the bwdif_vulkan filter we can sometimes see
exactly what's happening:
shaderStorageImageReadWithoutFormat support is false, but
shaderStorageImageWriteWithoutFormat support is true.
SPIR-V complains and then the GPU hangs since elk can't do the
necessary lowering. See here:
if (var->data.image.format == PIPE_FORMAT_NONE)
   return false;
To make deinterlacing work again the fix probably needs to be in
FFmpeg. See its commit 779763181f85bf25c53af5789d8b9b99d3bb0d1d.

Assisted-by: Claude
2026-07-21 22:25:26 +03:00
dancingmirrors cd1018d5ea hasvk: Advertise VK_KHR_internally_synchronized_queues.
Advertise the extension and feature and accept the internally synchronized
queue create flag. FFmpeg has deprecated its own queue locking mechanism.

Assisted-by: Claude
2026-07-21 22:25:26 +03:00
dancingmirrors 2e5cca4d05 hasvk: Properly handle interlaced video.
There was no handling here at all so the GPU would just hang immediately.

Assisted-by: Claude
2026-07-21 22:25:25 +03:00
dancingmirrors a7089e8341 hasvk: Clamp several MFX_AVC_IMG_STATE fields in case the slice parser fails us.
Also cap the reference frame count at the supported 16.

Assisted-by: Claude
2026-07-21 22:25:25 +03:00
dancingmirrors 4a162aa46b hasvk: Range check and fail the parse upon lost bit alignment in the slice parser.
Assisted-by: Claude
2026-07-21 22:25:25 +03:00
dancingmirrors fac6387b34 hasvk: Account for frames wider than 128 MBs on gen7.
Fixes corruption and GPU hangs observed with a 4096 wide video.

Assisted-by: Claude
2026-07-21 22:25:25 +03:00
dancingmirrors bd3d4fc732 hasvk: Gate video decode behind HASVK_DEBUG=video-decode.
Assisted-by: Claude
2026-07-21 22:25:24 +03:00
dancingmirrors 31fd4c3ded hasvk: Simplify get_h264_video_session_mem_reqs.
Based on ANV code but with the same alignment of 64.

Assisted-by: Claude
2026-07-21 22:25:24 +03:00
dancingmirrors 3d258cbaf7 hasvk: Gate video decode behind VIDEO_CODEC_H264DEC so we don't advertise it without the codec.
Assisted-by: Claude
2026-07-21 22:25:24 +03:00
dancingmirrors a2727d71b6 hasvk: Neutralize the unwritten chroma with monochrome video.
Otherwise we sample garbage with, say, yuvj420p.

Assisted-by: Claude
2026-07-21 22:25:23 +03:00
dancingmirrors 881ec70b2f hasvk: Expose VK_KHR_video_maintenance1 and VK_KHR_video_maintenance2.
Assisted-by: Claude
2026-07-21 22:25:23 +03:00
dancingmirrors 0f70099a69 hasvk: Reject result status queries on the video decode queue.
Inline queries enabled by video_maintenance1 would just lock up my
machine and I'm not sure a proper workaround exists.

A few nits while here.

Assisted-by: Claude
2026-07-21 22:25:23 +03:00
dancingmirrors b0d1db9406 hasvk: Work around FFmpeg commit 24db09a881c9e0eb5b36dcf693c6ac17e9d56be8.
This is mostly for old versions of the VVL.

Assisted-by: Claude
2026-07-21 22:25:23 +03:00
dancingmirrors c96439dde4 hasvk: Flesh out the video decode format support.
Assisted-by: Claude
2026-07-21 22:25:22 +03:00
dancingmirrors 23b29b1f92 hasvk: Rework H.264 decode into long mode.
This is why the previously added slice header parser exists.

Assisted-by: Claude
2026-07-21 22:08:59 +03:00
dancingmirrors c3fe6d4a87 hasvk: Rename genX_video.c to genX_cmd_video.c to match ANV. 2026-07-21 22:08:59 +03:00
dancingmirrorsandirql-notlessorequal 9dad5c1a52 hasvk: Add a slice header parser for H.264 decode.
This is required for long mode, where the driver parses the slice header
itself rather than relying on the hardware to do it.

Co-authored-by: irql-notlessorequal <[email protected]>

[dancingmirrors: Assisted-by: Claude]
2026-07-21 22:08:59 +03:00
dancingmirrors 5c6ad1fb4c hasvk: Validate profiles and harden the video session objects.
Assisted-by: Claude
2026-07-21 22:08:59 +03:00
dancingmirrors cece575042 intel/genxml: A few additions and fixes for video decode.
Assisted-by: Claude
2026-07-21 22:08:58 +03:00
dancingmirrors ed56facc56 hasvk: Drop the video queue paths for CmdSetEvent2 and CmdResetEvent2.
Assisted-by: Claude
2026-07-21 22:08:58 +03:00
dancingmirrors 878d7c9717 hasvk: Sync the per-queue-family batch decoders with current ANV.
Assisted-by: Claude
2026-07-21 22:08:58 +03:00